DP83256VF National Semiconductor, DP83256VF Datasheet - Page 87

• Manufacturer Part Number: DP83256VF
• Description: IC FDDI LAYER CTRLR 160PQFP
• Manufacturer: National Semiconductor
• Series: PLAYER+™r

Specifications of DP83256VF

• Controller Type: physical layer controller
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Interface: -
• Other names: *DP83256VF

5 0 Registers
5 43 GAIN REGISTER (GAINREG)
The Gain Register contains the settings for the CGM’s on-chip programmable loop filter For optimal jitter performance on the
revision A and B PLAYER
revision A or B (10h or 11h) before changing the filter setting as later revisions will default to the correct setting which may be a
different filter position number
Pseudo Code Programming Example
Care must be taken when changing the settings of the on-chip programmable loop filter The filter should only be set to the
recommended value and the additional bits in the Gain Register must not be altered Alteration of the reserved bits in the Gain
Register may result in improper PLAYER
The following pseudo code outlines the proper procedure for setting the Gain Register loop filter settings to the correct value
if (IDR
else
ACCESS RULES
D0 –D4
D5 –D7
define REV B 0x11
define REV A 0x10
define LOOP MASK 0x1F
define NEW LOOP 0x40
Bit
FILT2
Register names and constants are all in UPPERCASE
D7
ADDRESS
Do Nothing
3Dh
k
Symbol
RES
FILT0
FILT1
FILT2
temp
temp
temp
GAIN REG
REV B)
FILT1
D6
(Continued)
GAIN REG
temp
temp
a
RESERVED Do not alter these bits The device may cease to operate properly if these bits are
changed
FILTER SELECTION
loop filters
Note Filter combinations that are not specified or recommended should not be used and may result in non-optimal device
FILT2
Always
temp
READ
device’s Filter Position 4 should be used The user should check that the IDR register is equal to
l
1
1
0
0
0
FILT0
NEW LOOP
LOOP MASK
D5
performance
FILT1
a
1
1
0
0
1
device operation
RES
D4
WRITE
Always
k
0 1 2
FILT0
0
1
0
1
0
l
RES
D3
The Filter Selection
87
FP0 Filter Position 0
FP1 Filter Position 1
FP2 Filter Position 2 This is the filter selected after reset on the
revision A and B PLAYER
FP3 Filter Position 3
FP4 Filter Position 4 This is the recommended filter position for
the revision A and B PLAYER
Description
RES
D2
k
0 1 2
RES
D1
l
a
bits select one of five on-chip CGM
devices
a
devices
RES
D0