DP83256VF National Semiconductor, DP83256VF Datasheet - Page 130
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
DP83256VF
Manufacturer Part Number
DP83256VF
Description
IC FDDI LAYER CTRLR 160PQFP
Manufacturer
National Semiconductor
Series
PLAYER+™r
Datasheet
1.DP83256VF.pdf
(144 pages)
Specifications of DP83256VF
Controller Type
physical layer controller
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Interface
-
Other names
*DP83256VF
- Current page: 130 of 144
- Download datasheet (997Kb)
8 0 Connection Diagrams
Pin No
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
PMD Indicate Data
Sense Pin 0
Enable Pin 0
Sense Pin 1
Enable Pin 1
ECL Power
ECL Ground
PMD Transmitter Enable
PMD Transmitter Enable Level
Reserved 0
No Connect
Reserved 0
Reserved 0
Reserved 0
Reserved 0
No Connect
ECL Ground
ECL Power
Reserved 0
Reserved 0
PHY Port B Request Data
PHY Port B Request Data
PHY Port B Request Data
PHY Port B Request Data
PHY Port B Request Data
I O Ground
I O Power
PHY Port B Request Data
PHY Port B Request Data
PHY Port B Request Data
PHY Port B Request Control
PHY Port B Request Parity
E Device Reset
Read E Write
Chip Enable
E Interrupt
E Acknowledge
Control Bus Address
TABLE 8-1 DP83256 100-Pin PQFP Pinout Summary (Continued)
Signal Name
(Continued)
a
k
0
l
k
k
k
k
k
k
k
k
0
1
2
3
4
5
6
7
l
l
l
l
l
l
l
l
130
GND ECL
GND ECL
V
V
GND IO
V
Symbol
RES 0
RES 0
RES 0
RES 0
RES 0
RES 0
RES 0
PMID
CC
CC
R E W
E RST
E ACK
BRD0
BRD1
BRD2
BRD3
BRD4
BRD5
BRD6
BRD7
E INT
CC
CBA0
E CE
BRC
BRP
SP0
EP0
SP1
EP1
TXE
N C
N C
TEL
ECL
ECL
a
IO
I O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Open Drain
Open Drain
Pin Type
a
a
a
a
a
a
a
a
a
a
a
a
a
ECL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
5V
0V
0V
0V
0V
0V
0V
0V
5V
0V
0V
0V
5V
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