PIC18F452-I/L Microchip Technology Inc., PIC18F452-I/L Datasheet - Page 214
PIC18F452-I/L
Manufacturer Part Number
PIC18F452-I/L
Description
44 PIN, 32 KB FLASH, 1536 RAM, 34 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F452-IL.pdf
(332 pages)
Specifications of PIC18F452-I/L
A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC18FXX2
TABLE 20-1:
DS39564C-page 212
a
bbb
BSR
d
dest
f
fs
fd
k
label
mm
*
*+
*-
+*
n
PRODH
PRODL
s
u
WREG
x
TBLPTR
TABLAT
TOS
PC
PCL
PCH
PCLATH
PCLATU
GIE
WDT
TO
PD
C, DC, Z, OV, N ALU status bits Carry, Digit Carry, Zero, Overflow, Negative
[
(
< >
italics
]
)
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
Bit address within an 8-bit file register (0 to 7)
Bank Select Register. Used to select the current RAM bank.
Destination select bit;
d = 0: store result in WREG,
d = 1: store result in file register f.
Destination either the WREG register or the specified register file location
8-bit Register file address (0x00 to 0xFF)
12-bit Register file address (0x000 to 0xFFF). This is the source address.
12-bit Register file address (0x000 to 0xFFF). This is the destination address.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value)
Label name
The mode of the TBLPTR register for the Table Read and Table Write instructions.
Only used with Table Read and Table Write instructions:
The relative address (2’s complement number) for relative branch instructions, or the direct address for
Call/Branch and Return instructions
Product of Multiply high byte
Product of Multiply low byte
Fast Call/Return mode select bit.
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
Unused or Unchanged
Working register (accumulator)
Don't care (0 or 1)
The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all
Microchip software tools.
21-bit Table Pointer (points to a Program Memory location)
8-bit Table Latch
Top-of-Stack
Program Counter
Program Counter Low Byte
Program Counter High Byte
Program Counter High Byte Latch
Program Counter Upper Byte Latch
Global Interrupt Enable bit
Watchdog Timer
Time-out bit
Power-down bit
Optional
Contents
Assigned to
Register bit field
In the set of
User defined term (font is courier)
No Change to register (such as TBLPTR with Table reads and writes)
Post-Increment register (such as TBLPTR with Table reads and writes)
Post-Decrement register (such as TBLPTR with Table reads and writes)
Pre-Increment register (such as TBLPTR with Table reads and writes)
Description
© 2006 Microchip Technology Inc.
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