PIC18F2550-I/SP Microchip Technology Inc., PIC18F2550-I/SP Datasheet - Page 272
PIC18F2550-I/SP
Manufacturer Part Number
PIC18F2550-I/SP
Description
Microcontroller; 32 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F2550-ISP.pdf
(430 pages)
Specifications of PIC18F2550-I/SP
A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2550-I/SP
Manufacturer:
MICROCHIP
Quantity:
2 100
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PIC18F2455/2550/4455/4550
22.1
There are eight modes of operation for the compara-
tors, shown in Figure 22-1. Bits CM2:CM0 of the
CMCON register are used to select these modes. The
TRISA register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 22-1:
DS39632C-page 270
Comparators Reset
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 010
Two Common Reference Comparators
CM2:CM0 = 100
One Independent Comparator with Output
CM2:CM0 = 001
A = Analog Input, port reads zeros always
* Setting the TRISA<5:4> bits will disable the comparator outputs by configuring the pins as inputs.
RA4/T0CKI/C1OUT*/RCV
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
REF
REF
REF
REF
REF
REF
REF
REF
+
-/CV
+
-/CV
+
-/CV
+
-/CV
Comparator Configuration
REF
REF
REF
REF
A
A
A
A
A
A
A
A
A
A
A
D
A
A
D
D
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
COMPARATOR I/O OPERATING MODES
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ‘0’)
Off (Read as ‘0’)
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
Off (Read as ‘0’)
D = Digital Input
Preliminary
Two Common Reference Comparators with Outputs
CM2:CM0 = 101
Two Independent Comparators with Outputs
CM2:CM0 = 011
Comparators Off (POR Default Value)
CM2:CM0 = 111
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 110
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
RA0/AN0
RA3/AN3/
V
RA4/T0CKI/C1OUT*/RCV
RA1/AN1
RA2/AN2/
V
RA5/AN4/SS/HLVDIN/C2OUT*
RA0/AN0
RA3/AN3/
V
RA4/T0CKI/C1OUT*/
RCV
RA1/AN1
RA2/AN2/
V
RA5/AN4/SS/HLVDIN/C2OUT*
RA0/AN0
RA3/AN3/
V
RA1/AN1
RA2/AN2/
V
REF
REF
REF
REF
REF
REF
REF
REF
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 28.0 “Electrical Characteristics”.
Note:
CIS (CMCON<3>) is the Comparator Input Switch
+
-/CV
+
-/CV
+
-/CV
+
-/CV
REF
REF
REF
REF
A
A
A
A
D
D
D
D
A
A
A
A
Comparator interrupts should be disabled
during a Comparator mode change.
Otherwise, a false interrupt may occur.
A
A
A
D
V
V
V
V
V
V
V
V
CIS = 0
CIS = 1
CIS = 0
CIS = 1
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
V
V
V
V
IN
IN
IN
IN
-
+
-
+
© 2006 Microchip Technology Inc.
C1
C2
C1
C2
V
V
V
V
C1
C2
IN
IN
IN
IN
CV
-
+
-
+
REF
C1OUT
C2OUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C1
C2
From V
C1OUT
C2OUT
REF
C1OUT
C2OUT
Module
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