PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 390

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

BSF ................................................................................... 293
BTFSC .............................................................................. 294
BTFSS............................................................................... 294
BTG................................................................................... 295
BZ...................................................................................... 296
C
C Compilers
CALL ................................................................................. 296
CAN Module
DS41159D-page 388
PIC18FXX8
MPLAB C17 .............................................................. 324
MPLAB C18 .............................................................. 324
MPLAB C30 .............................................................. 324
Aborting Transmission .............................................. 228
Acknowledge Error.................................................... 237
Baud Rate Registers ................................................. 218
Baud Rate Setting..................................................... 233
Bit Error ..................................................................... 237
Bit Time Partitioning (diagram) ................................. 233
Bit Timing Configuration Registers ........................... 236
Calculating T
Configuration Mode................................................... 226
Control and Status Registers .................................... 201
Controller Register Map ............................................ 225
CRC Error ................................................................. 237
Disable Mode ............................................................ 226
Error Detection .......................................................... 237
Error Modes and Error Counters............................... 237
Error Modes State (diagram) .................................... 238
Error Recognition Mode ............................................ 227
Error States ............................................................... 237
Filter/Mask Truth (table) ............................................ 232
Form Error................................................................. 237
Hard Synchronization................................................ 235
I/O Control Register .................................................. 221
Information Processing Time .................................... 234
Initiating Transmission .............................................. 228
Internal Message Reception
Internal Transmit Message
Interrupt Acknowledge .............................................. 239
Interrupt Registers .................................................... 222
Interrupts ................................................................... 238
Lengthening a Bit Period
BRGCON1 ........................................................ 236
BRGCON2 ........................................................ 236
BRGCON3 ........................................................ 236
Nominal Bit Time............................................... 234
Flowchart .......................................................... 231
Flowchart .......................................................... 229
Bus Activity Wake-up ........................................ 239
Bus-Off.............................................................. 239
Code Bits .......................................................... 238
Error .................................................................. 239
Message Error .................................................. 239
Receive ............................................................. 238
Receiver Bus Passive ....................................... 239
Receiver Overflow............................................. 239
Receiver Warning ............................................. 239
Transmit ............................................................ 238
Transmitter Bus Passive ................................... 239
Transmitter Warning ......................................... 239
(diagram)........................................................... 235
Q
, Nominal Bit Rate and
Capture (CCP Module) ..................................................... 124
Capture (ECCP Module)................................................... 133
Capture/Compare/PWM (CCP) ........................................ 123
Ceramic Resonators
Clocking Scheme................................................................ 41
CLRF ................................................................................ 297
CLRWDT .......................................................................... 297
Listen Only Mode...................................................... 226
Loopback Mode ........................................................ 227
Message Acceptance Filters
Message Acceptance Mask and
Message Reception .................................................. 230
Message Time-Stamping.......................................... 230
Message Transmission............................................. 227
Modes of Operation .................................................. 226
Normal Mode ............................................................ 226
Oscillator Tolerance.................................................. 236
Overview................................................................... 199
Phase Buffer Segments............................................ 234
Programming Time Segments .................................. 236
Propagation Segment ............................................... 234
Receive Buffer Registers .......................................... 210
Receive Buffers ........................................................ 230
Receive Message Buffering...................................... 230
Receive Priority......................................................... 230
Registers .................................................................. 201
Resynchronization .................................................... 235
Sample Point ............................................................ 234
Shortening a Bit Period (diagram) ............................ 236
Stuff Bit Error ............................................................ 237
Synchronization ........................................................ 235
Synchronization Rules .............................................. 235
Synchronization Segment......................................... 234
Time Quanta ............................................................. 234
Transmit Buffer Registers ......................................... 206
Transmit Buffers ....................................................... 227
Transmit Priority........................................................ 227
Transmit/Receive Buffers ......................................... 199
Values for ICODE (table).......................................... 239
CAN Message Time-Stamp ...................................... 125
CCP Pin Configuration.............................................. 124
CCP1 Prescaler ........................................................ 125
CCPR1H:CCPR1L Registers.................................... 124
Software Interrupt ..................................................... 125
Timer1/Timer3 Mode Selection................................. 124
CAN Message Time-Stamp ...................................... 133
Capture Mode. See Capture
CCP1 Module ........................................................... 124
CCPR1H Register..................................................... 124
CCPR1L Register ..................................................... 124
Compare Mode. See Compare
Interaction of CCP1 and
PWM Mode. See PWM (CCP Module).
Ranges Tested ........................................................... 17
and Masks ................................................ 215, 232
Filter Operation (diagram) ................................ 232
(CCP Module).
Timer Resources .............................................. 124
(CCP Module).
ECCP1 Modules ............................................... 124
 2004 Microchip Technology Inc.