DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 115

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DSPIC30F2020-30I/SP

Manufacturer Part Number
DSPIC30F2020-30I/SP
Description
DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F2020-30I/SP

A/d Inputs
8-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Ios
21
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
512 Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
REGISTER 12-5:
REGISTER 12-6:
© 2006 Microchip Technology Inc.
bit 11
bit 10
bit 9
bit 8
bit 7-6
bit 5-2
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
R/W-0
R/W-0
The minimum value for this register is 0x0008 and the maximum value is 0xFFEF.
CLIEN: Current-Limit Interrupt Enable bit
1 = Current-limit interrupt enabled
0 = Current-limit interrupt disabled and CLSTAT bit is cleared
TRGIEN: Trigger Interrupt Enable bit
1 = A trigger event generates an interrupt request
0 = Trigger event interrupts are disabled and TRGSTAT bit is cleared
ITB: Independent Time Base Mode bit
1 = Phasex register provides time base period for this PWM generator
0 = Primary time base provides timing for this PWM generator
MDCS: Master Duty Cycle Register Select bit
1 = MDC register provides duty cycle information for this PWM generator
0 = DCx register provides duty cycle information for this PWM generator
DTC<1:0>: Dead-time Control bits
00 = Positive dead time actively applied for all output modes
01 = Negative dead time actively applied for all output modes
10 = Dead-time function is disabled
11 = Reserved
Unimplemented: Read as ‘0’
XPRES: External PWM Reset Control bit
1 = Current-limit source resets time base for this PWM generator if it is in independent time base
0 = External pins do not affect PWM time base
IUE: Immediate Update Enable bit
1 = Updates to the active PDC registers are immediate
0 = Updates to the active PDC registers are synchronized to the PWM time base
PWM Generator #x Duty Cycle Value bits
R/W-0
R/W-0
mode
PWMCONx: PWM CONTROL REGISTER (CONTINUED)
PDCx: PWM GENERATOR DUTY CYCLE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
PDCx<15:8>
PDCx<7:0>
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
dsPIC30F1010/202X
R/W-0
R/W-0
x = Bit is unknown
R/W-0
R/W-0
DS70178C-page 113
R/W-0
R/W-0
bit 8
bit 0

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