DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 277
DSPIC30F2020-30I/SP
Manufacturer Part Number
DSPIC30F2020-30I/SP
Description
DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F2023-30IPT.pdf
(286 pages)
Specifications of DSPIC30F2020-30I/SP
A/d Inputs
8-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Ios
21
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
512 Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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APPENDIX A:
Revision A (June 2006)
• Initial release of this document.
Revision B (August 2006)
This revision includes:
Updated
INTTREG register.
Updated device configuration registers to include FBS
Boot Code Segment and FOSCEL Oscillator Selection
configuration registers (see Section 18.10 “Device
Configuration Registers”).
Updated Electrical Characteristics:
• I
Typographical corrections:
• dsPIC30F1010/2020 Port Registers (see Table 6-1)
• dsPIC30F2023 Port Registers (see Table 6-2)
• dsPIC30F1010/202X CNEN1 SFR reset state
• PWMCONx (see Register 12-5)
• ALTDTRx (see Register 12-9)
• ADCPC1 (see Register 16-6)
© 2006 Microchip Technology Inc.
87 ma (see Table 21-6)
- TRISA SFR bit 9 corrected to “TRISA9”
- TRISD SFR Reset State corrected to
- TRISA SFR bit 0 corrected to “unused”
- PORTA SFR bit 0 corrected to “unused”
- LATA SFR bit 0 corrected to “unused”
- TRISD SFR bit 0 corrected to “TRISD0”
- PORTD SFR bit 0 corrected to “RD0”
- LATD SFR bit 0 corrected to “LATD0”
- TRISD SFR reset state corrected to
corrected to “0000 0000 0000 0000“
(see Table 6-3)
- Bit 13 description corrected to “TRGSTAT”
- Bit 10 description corrected to “TRGIEN”
- Bits 15-14 corrected to “unused”
- TRGSRC2<4:0> corrected to include bit 4
IDLE
“0000 0000 0000 0011”
“0000 0000 0000 0011”
Parameter DC43f Max Value revised to
Section 5.0
REVISION HISTORY
“Interrupts”
to
include
Preliminary
Revision C (November 2006)
This revision includes:
Updated RC, EC and HS Crystal operating frequencies
for Industrial and Extended Temperatures.
Revised SPI section to reflect updated operating fre-
quencies (see Section 13.0 “Serial Peripheral Inter-
face (SPI)”).
Revised oscillator configurations (see Section 18.3
“Oscillator Configurations”).
Updated Electrial Characteristics:
• Supply voltage parameter DC11 minimum value
• Operating current (I
• Idle current (I
• I/O Pin Input specifications (see Table 21-8)
• I/O Pin Output specifications (see Table 21-9)
• External Clock Timing (see Figure 21-2 and
• PLL Clock Timing (see Table 21-13)
• Internal RC Accuracy (see Table 21-15)
• Power-up Timer Period (see Table 21-18)
changed to 3.0V (see Table 21-4)
Table 21-12)
dsPIC30F1010/202X
IDLE
) (see Table 21-6)
DD
) (see Table 21-5)
DS70178C-page 275
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