DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 124

• Manufacturer Part Number: DSPIC30F2020-30I/SP
• Description: DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F2020-30I/SP

• A/d Inputs: 8-Channels, 10-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Ios: 21
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 28-pin SPDIP
• Programmable Memory: 12K Bytes
• Ram Size: 512 Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 3-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F1010/202X
12.4.4
Multi-Phase PWM, as shown in Figure 12-6, uses
phase-shift values in the Phase registers to shift the
PWM outputs relative to the primary time base.
Because the phase-shift values are added to the pri-
mary time base, the phase-shifted outputs occur earlier
than a PWM channel that specifies zero phase shift. In
Multi-Phase mode, the specified phase shift is fixed by
the application’s design.
FIGURE 12-6:
12.4.5
Figure 12-7 shows the waveforms for Variable Phase-
Shift PWM. Power-converter circuits constantly change
the phase shift among PWM channels as a means to
control the flow of power, in contrast to most PWM cir-
cuits that vary the duty cycle of PWM signals to control
power flow. Often, in variable phase applications, the
PWM duty cycle is maintained at 50%. The phase-shift
value should be updated when the PWM signal is not
asserted. Complementary outputs are available in Vari-
able Phase-Shift mode.
FIGURE 12-7:
DS70178C-page 122
PWM1H
PWM2H
PWM4H
PWM3H
PWM2H
PWM1H
Phase2 (old value)
Duty Cycle
MULTI-PHASE PWM MODE
VARIABLE PHASE PWM MODE
Duty Cycle
Duty Cycle
Phase4
Duty Cycle
Phase3
MULTI-PHASE PWM
VARIABLE PHASE PWM
Period
Phase2
Duty Cycle
Period
PTMR=0
Phase2 (new value)
Duty Cycle
Duty Cycle
Duty Cycle
Preliminary
12.4.6
Figure 12-8
mode. This mode truncates the asserted PWM signal
when the selected external Fault signal is asserted.
The PWM output values are specified by the Fault
override bits (FLTDAT<1:0>) in the IOCONx register.
The override output remains in effect until the begin-
ning of the next PWM cycle. This mode is sometimes
used in Power Factor Correction (PFC) circuits where
the inductor current controls the PWM on time. This is
a constant frequency PWM mode.
FIGURE 12-8:
Period
Value
Duty
Cycle
PWMH
PWMH
0
FLTx Negates PWM
Timer
Value
CURRENT-LIMIT PWM MODE
Duty Cycle
Programmed
Duty Cycle
Actual
shows
CYCLE-BY-CYCLE
CURRENT-LIMIT PWM
MODE
Cycle-by-Cycle
© 2006 Microchip Technology Inc.
FLTx Negates PWM
Programmed
Duty Cycle
Duty Cycle
Actual
Current-Limit