DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 86

• Manufacturer Part Number: DSPIC30F2020-30I/SP
• Description: DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F2020-30I/SP

• A/d Inputs: 8-Channels, 10-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Ios: 21
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 28-pin SPDIP
• Programmable Memory: 12K Bytes
• Ram Size: 512 Bytes
• Timers: 3-16-bit, 1-32-bit
• Voltage, Range: 3-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F1010/202X
7.6.3
Example 7-2 shows a sequence of instructions that
can be used to load the 96 bytes of write latches. 32
TBLWTL and 32 TBLWTH instructions are needed to
load the write latches selected by the table pointer.
EXAMPLE 7-2:
7.6.4
For protection, the write initiate sequence for NVMKEY
must be used to allow any erase or program operation
to proceed. After the programming command has been
executed, the user must wait for the programming time
until programming is complete. The two instructions
following the start of the programming sequence
should be NOPs.
EXAMPLE 7-3:
DS70178C-page 84
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 31st_program_word
Note: In Example 7-2, the contents of the upper byte of W3 have no effect.
2nd_program_word
MOV
MOV
MOV
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
•
•
•
MOV
MOV
TBLWTL W2
TBLWTH W3
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
LOADING WRITE LATCHES
INITIATING THE PROGRAMMING
SEQUENCE
#0x0000,W0
W0
#0x6000,W0
#LOW_WORD_0,W2
#HIGH_BYTE_0,W3
#LOW_WORD_1,W2
#HIGH_BYTE_1,W3
#LOW_WORD_2,W2
#HIGH_BYTE_2,W3
#LOW_WORD_31,W2
#HIGH_BYTE_31,W3
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
,
,
,
,
,
,
,
,
,
,
,
LOADING WRITE LATCHES
TBLPAG
[W0]
[W0++]
[W0]
[W0++]
INITIATING A PROGRAMMING SEQUENCE
NVMKEY
NVMKEY
[W0]
[W0++]
[W0]
[W0++]
Preliminary
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 0x55 key
;
; Write the 0xAA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
© 2006 Microchip Technology Inc.