DSPIC30F4013-20E/P Microchip Technology Inc., DSPIC30F4013-20E/P Datasheet - Page 195

• Manufacturer Part Number: DSPIC30F4013-20E/P
• Description: 16 BIT MCU/DSP 40LD 20MIPS 48 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F4013-20E/P

• A/d Inputs: 13-Channels, 12-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 40-pin PDIP
• Programmable Memory: 48K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 109
A
A/D .................................................................................... 109
AC Characteristics ............................................................ 155
AC Temperature and Voltage Specifications .................... 155
ADC
ADC Conversion Speeds .................................................. 112
Address Generator Units .................................................... 41
Alternate Vector Table ........................................................ 67
Analog-to-Digital Converter. See ADC.
Assembler
Automatic Clock Stretch...................................................... 96
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 25
Bit-Reversed Addressing .................................................... 44
Block Diagrams
© 2006 Microchip Technology Inc.
Aborting a Conversion .............................................. 111
ADCHS Register ....................................................... 109
ADCON1 Register..................................................... 109
ADCON2 Register..................................................... 109
ADCON3 Register..................................................... 109
ADCSSL Register ..................................................... 109
ADPCFG Register..................................................... 109
Configuring Analog Port Pins.............................. 58, 115
Connection Considerations....................................... 115
Conversion Operation ............................................... 110
Effects of a Reset...................................................... 114
Operation During CPU Idle Mode ............................. 114
Operation During CPU Sleep Mode.......................... 114
Output Formats ......................................................... 114
Power-Down Modes.................................................. 114
Programming the Sample Trigger............................. 111
Register Map............................................................. 117
Result Buffer ............................................................. 110
Sampling Requirements............................................ 113
Selecting the Conversion Sequence......................... 110
Load Conditions ........................................................ 155
Selecting the Conversion Clock ................................ 111
MPASM Assembler................................................... 142
During 10-bit Addressing (STREN = 1)....................... 96
During 7-bit Addressing (STREN = 1)......................... 96
Receive Mode ............................................................. 96
Transmit Mode ............................................................ 96
Requirements............................................................ 162
Timing Characteristics .............................................. 162
Example ...................................................................... 45
Implementation ........................................................... 44
Modifier Values Table ................................................. 45
Sequence Table (16-Entry)......................................... 45
12-bit ADC Functional............................................... 109
16-bit Timer1 Module .................................................. 71
16-bit Timer2............................................................... 77
16-bit Timer3............................................................... 77
32-bit Timer2/3............................................................ 76
DSP Engine ................................................................ 22
dsPIC30F2011 ............................................................ 10
dsPIC30F2012 ............................................................ 11
dsPIC30F3013 ............................................................ 13
External Power-on Reset Circuit............................... 127
dsPIC30F2011/2012/3012/3013
BOR Characteristics ......................................................... 153
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 119
Control Registers ................................................................ 48
Core Architecture
CPU Architecture Overview ................................................ 17
Customer Change Notification Service............................. 199
Customer Notification Service .......................................... 199
Customer Support............................................................. 199
D
Data Accumulators and Adder/Subtractor .......................... 23
Data Address Space........................................................... 33
Data EEPROM Memory...................................................... 53
I
Input Capture Mode.................................................... 81
Oscillator System...................................................... 121
Output Compare Mode ............................................... 85
Reset System ........................................................... 125
Shared Port Structure................................................. 57
SPI.............................................................................. 89
SPI Master/Slave Connection..................................... 90
UART Receiver......................................................... 102
UART Transmitter..................................................... 101
Characteristics.......................................................... 153
Timing Requirements ............................................... 161
MPLAB C18.............................................................. 142
MPLAB C30.............................................................. 142
I/O Timing Characteristics ........................................ 177
I/O Timing Requirements.......................................... 177
Characteristics.......................................................... 160
Requirements ........................................................... 160
Data EEPROM Block Erase ....................................... 54
Data EEPROM Block Write ........................................ 56
Data EEPROM Read.................................................. 53
Data EEPROM Word Erase ....................................... 54
Data EEPROM Word Write ........................................ 55
Erasing a Row of Program Memory ........................... 49
Initiating a Programming Sequence ........................... 50
Loading Write Latches ................................................ 50
NVMADR .................................................................... 48
NVMADRU ................................................................. 48
NVMCON.................................................................... 48
NVMKEY .................................................................... 48
Overview..................................................................... 17
Data Space Write Saturation ...................................... 25
Overflow and Saturation ............................................. 23
Round Logic ............................................................... 24
Write-Back .................................................................. 24
Alignment.................................................................... 36
Alignment (Figure) ...................................................... 36
Effect of Invalid Memory Accesses (Table) ................ 36
MCU and DSP (MAC Class) Instructions Example .... 35
Memory Map......................................................... 33, 34
Near Data Space ........................................................ 37
Software Stack ........................................................... 37
Spaces........................................................................ 36
Width .......................................................................... 36
Erasing ....................................................................... 54
2
C .............................................................................. 94
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