DSPIC30F4013-20E/P Microchip Technology Inc., DSPIC30F4013-20E/P Datasheet - Page 196

• Manufacturer Part Number: DSPIC30F4013-20E/P
• Description: 16 BIT MCU/DSP 40LD 20MIPS 48 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F4013-20E/P

• A/d Inputs: 13-Channels, 12-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 40-pin PDIP
• Programmable Memory: 48K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F2011/2012/3012/3013
DC Characteristics ............................................................ 145
Development Support ....................................................... 141
Device Configuration
Device Configuration Registers
Device Overview ............................................................. 9, 17
Disabling the UART........................................................... 103
Divide Support..................................................................... 20
DSP Engine......................................................................... 21
Dual Output Compare Match Mode .................................... 86
E
Electrical Characteristics
Enabling and Setting Up UART
Enabling the UART ........................................................... 103
Equations
Errata .................................................................................... 7
Exception Sequence
External Clock Timing Characteristics
External Clock Timing Requirements................................ 156
External Interrupt Requests ................................................ 68
F
Fast Context Saving............................................................ 68
Flash Program Memory....................................................... 47
DS70139D-page 194
Erasing, Block ............................................................. 54
Erasing, Word ............................................................. 54
Protection Against Spurious Write .............................. 56
Reading....................................................................... 53
Write Verify ................................................................. 56
Writing ......................................................................... 55
Writing, Block .............................................................. 55
Writing, Word .............................................................. 55
BOR .......................................................................... 153
Brown-out Reset ....................................................... 153
I/O Pin Input Specifications ....................................... 151
I/O Pin Output Specifications .................................... 151
Idle Current (I
Low-Voltage Detect................................................... 152
LVDL ......................................................................... 152
Operating Current (I
Power-Down Current (I
Program and EEPROM............................................. 154
Temperature and Voltage Specifications .................. 145
Register Map............................................................. 132
FBORPOR ................................................................ 130
FGS........................................................................... 130
FOSC ........................................................................ 130
FWDT........................................................................ 130
Instructions (Table) ..................................................... 20
Multiplier...................................................................... 23
Continuous Pulse Mode .............................................. 86
Single Pulse Mode ...................................................... 86
AC ............................................................................. 155
DC ............................................................................. 145
Alternate I/O .............................................................. 103
Setting Up Data, Parity and Stop Bit Selections ....... 103
ADC Conversion Clock ............................................. 111
Baud Rate ................................................................. 105
Serial Clock Rate ........................................................ 98
Trap Sources .............................................................. 65
Type A, B and C Timer ............................................. 163
Type A Timer ............................................................ 163
Type B Timer ............................................................ 164
Type C Timer ............................................................ 164
IDLE
) .................................................... 148
DD
)............................................. 147
PD
) ........................................ 149
I
I/O Pin Specifications
I/O Ports.............................................................................. 57
I
I
I
I
I
Idle Current (I
In-Circuit Serial Programming (ICSP)......................... 47, 119
Input Capture (CAPX) Timing Characteristics .................. 165
Input Capture Module ......................................................... 81
Input Capture Operation During Sleep and Idle Modes...... 82
Input Capture Timing Requirements................................. 165
Input Change Notification Module....................................... 61
Instruction Addressing Modes ............................................ 41
Instruction Set
2
2
2
2
2
C 10-bit Slave Mode Operation........................................ 95
C 7-bit Slave Mode Operation.......................................... 95
C Master Mode Operation................................................ 97
C Master Mode Support ................................................... 97
C Module
Input.......................................................................... 151
Output ....................................................................... 151
Parallel (PIO) .............................................................. 57
Reception ................................................................... 96
Transmission .............................................................. 96
Reception ................................................................... 95
Transmission .............................................................. 95
Baud Rate Generator ................................................. 98
Clock Arbitration ......................................................... 98
Multi-Master Communication, Bus Collision and
Reception ................................................................... 98
Transmission .............................................................. 97
Addresses................................................................... 95
Bus Data Timing Characteristics
Bus Data Timing Requirements
Bus Start/Stop Bits Timing Characteristics
General Call Address Support .................................... 97
Interrupts .................................................................... 97
IPMI Support............................................................... 97
Operating Function Description .................................. 93
Operation During CPU Sleep and Idle Modes ............ 98
Pin Configuration ........................................................ 93
Programmer’s Model .................................................. 93
Register Map .............................................................. 99
Registers .................................................................... 93
Slope Control .............................................................. 97
Software Controlled Clock Stretching (STREN = 1) ... 96
Various Modes............................................................ 93
Interrupts .................................................................... 82
Register Map .............................................................. 83
CPU Idle Mode ........................................................... 82
CPU Sleep Mode ........................................................ 82
dsPIC30F2012/3013 Register Map (Bits 7-0)............. 61
File Register Instructions ............................................ 41
Fundamental Modes Supported ................................. 41
MAC Instructions ........................................................ 42
MCU Instructions ........................................................ 41
Move and Accumulator Instructions............................ 42
Other Instructions ....................................................... 42
Overview................................................................... 136
Summary .................................................................. 133
Bus Arbitration .................................................... 98
Master Mode..................................................... 173
Slave Mode....................................................... 175
Master Mode..................................................... 174
Slave Mode....................................................... 175
Master Mode..................................................... 173
Slave Mode....................................................... 175
IDLE
) ............................................................ 148
© 2006 Microchip Technology Inc.