DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 12

• Manufacturer Part Number: DS26518GN+
• Description: IC TXRX T1/E1/J1 8PORT 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS26518GN+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.7
2.8
2.9
2.10
S Signaling freezing
S Ability to pass the T1 F-bit position through the elastic stores in the 2.048MHz backplane mode
S User-selectable synthesized clock output
S One HDLC controller engine for each T1/E1 port
S Independent 64-byte Rx and Tx buffers with interrupt support
S Access FDL, Sa, or single DS0 channel
S Compatible with polled or interrupt driven environments
S IEEE 1149.1 support
S Per-channel programmable on-chip bit error-rate testing (BERT)
S Pseudorandom patterns including QRSS
S User-defined repetitive patterns
S Daly pattern
S Error insertion single and continuous
S Total-bit and errored-bit counts
S Payload error insertion
S Error insertion in the payload portion of the T1 frame in the transmit path
S Errors can be inserted over the entire frame or selected channels
S Insertion options include continuous and absolute number with selectable insertion rates
S F-bit corruption for line testing
S Loopbacks (remote, local, analog, and per-channel loopback)
S 8-bit parallel control port
S Intel or Motorola nonmultiplexed support
S Flexible status registers support polled, interrupt, or hybrid program environments
S Software reset supported
S Hardware reset pin
S Software access to device ID and silicon revision
S Software access to device ID and silicon revision
S Three-wire synchronous serial data link operating in full-duplex slave mode up to 5Mbps
S Glueless connection and fully compliant to Motorola popular communication processors such as MPC8260
S Software provision ability for active phase of the serial clock (i.e., rising edge vs. falling edge), bit ordering
S Flexible status registers support polled, interrupt, or hybrid program environments
HDCL Controllers
Test and Diagnostics
Microcontroller Parallel Port
Slave Serial Peripheral Interface (SPI) Features
and microcontrollers such as M68HC11
of the serial data (most significant first vs. least significant bit first)
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DS26518 8-Port T1/E1/J1 Transceiver