DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 197

• Manufacturer Part Number: DS26518GN+
• Description: IC TXRX T1/E1/J1 8PORT 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS26518GN+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
The Transmit DDS Zero Code Registers (TDDS1–3) select which of the 24 T1 channels to insert DDS zero code
stuffing. These registers are enabled by T1.TCR2.TDDSEN.
Bits 7 to 0: Transmit Channels 1 to 24 DDS Zero Code Control Bits (CH[1:32])
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Firmware Revision (FR[7:0]). This read-only register reports the transmitter firmware revision.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: Also used to insert Fs framing pattern in D4 framing mode.
The Transmit FDL Register (T1TFDL) contains the Facility Data Link (FDL) information that is to be inserted on a
byte basis into the outgoing T1 data stream. The LSB is transmitted first. In D4 mode, only the lower six bits are
used.
Bit 7: Transmit FDL Bit 7 (TFDL7). MSB of the Transmit FDL Code.
Bit 6: Transmit FDL Bit 6 (TFDL6)
Bit 5: Transmit FDL Bit 5 (TFDL5)
Bit 4: Transmit FDL Bit 4 (TFDL4)
Bit 3: Transmit FDL Bit 3 (TFDL3)
Bit 2: Transmit FDL Bit 2 (TFDL2)
Bit 1: Transmit FDL Bit 1 (TFDL1)
Bit 0: Transmit FDL Bit 0 (TFDL0). LSB of the Transmit FDL Code.
(MSB)
CH16
CH24
CH8
0 = Do not affect data in this channel.
1 = Replace the channel with DDS Zero Code stuffing if the channel is all zeros.
CH15
CH23
TFDL7
CH7
FR7
7
0
7
0
CH14
CH22
CH6
TDDS1, TDDS2, TDDS3
Transmit DDS Zero Code Registers 1 to 3
108h, 109h, 10Ah + (200h x (n - 1)) : where n = 1 to 8
TFRID
Transmit Firmware Revision ID Register
161h + (200h x (n - 1)) : where n = 1 to 8
T1TFDL
Transmit FDL Register
162h + (200h x (n - 1)) : where n = 1 to 8
TFDL6
FR6
6
0
6
0
CH13
CH21
CH5
TFDL5
FR5
5
0
5
0
CH12
CH20
CH4
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TFDL4
FR4
4
0
4
0
CH11
CH19
CH3
TFDL3
FR3
CH10
CH18
3
0
3
0
CH2
DS26518 8-Port T1/E1/J1 Transceiver
(LSB)
CH17
TFDL2
CH1
CH9
FR2
2
0
2
0
TDDS1
TDDS2
TDDS3
TFDL1
FR1
1
0
1
0
TFDL0
FR0
0
0
0
0