PIC18F46K80-I/ML Microchip Technology Inc., PIC18F46K80-I/ML Datasheet - Page 77

• Manufacturer Part Number: PIC18F46K80-I/ML
• Description: 44 QFN 8X8X0.9MM TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F46K80-I/ML

• A/d Inputs: 11-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin QFN
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 4-3:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP5MD
R/W-0
CCP5MD: CCP5 Module Disable bit
1 = The CCP5 module is disabled. All CCP5 registers are held in Reset and are not writable.
0 = The CCP5 module is enabled
CCP4MD: CCP4 Module Disable bit
1 = The CCP4 module is disabled. All CCP4 registers are held in Reset and are not writable.
0 = The CCP4 module is enabled
CCP3MD: CCP3 Module Disable bit
1 = The CCP3 module is disabled. All CCP3 registers are held in Reset and are not writable.
0 = The CCP3 module is enabled
CCP2MD: CCP2 Module Disable bit
1 = The CCP2 module is disabled. All CCP2 registers are held in Reset and are not writable.
0 = The CCP2 module is enabled
CCP1MD: ECCP1 Module Disable bit
1 = The ECCP1 module is disabled. All ECCP1 registers are held in Reset and are not writable.
0 = The ECCP1 module is enabled
UART2MD: EUSART2 Module Disable bit
1 = The USART2 module is disabled. All USART2 registers are held in Reset and are not writable.
0 = The USART2 module is enabled
UART1MD: EUSART1 Module Disable bit
1 = The USART1 module is disabled. All USART1 registers are held in Reset and are not writable.
0 = The USART1 module is enabled
SSPMD: MSSP Module Disable bit
1 = The MSSP module is disabled. All SSP registers are held in Reset and are not writable.
0 = The MSSP module is enabled
CCP4MD
R/W-0
PMD0: PERIPHERAL MODULE DISABLE REGISTER 0
W = Writable bit
‘1’ = Bit is set
CCP3MD
R/W-0
CCP2MD
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
CCP1MD
R/W-0
UART2MD
R/W-0
x = Bit is unknown
UART1MD
R/W-0
DS39977C-page 77
SSPMD
R/W-0
bit 0