PIC12F683-I/MD Microchip Technology Inc., PIC12F683-I/MD Datasheet - Page 94

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PIC12F683-I/MD

Manufacturer Part Number
PIC12F683-I/MD
Description
8 PIN, 3.5KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/MD

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Frequency
20 MHz
Input Output
6
Memory Type
Flash
Number Of Bits
8
Package Type
8-Pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Serial Interface
None
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Quantity
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Part Number:
PIC12F683-I/MD
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PIC12F683
FIGURE 12-10:
12.8
If
programmed, the on-chip program memory can be
read out using ICSP for verification purposes.
12.9
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are readable
and writable during Program/Verify mode. Only the
Least Significant 7 bits of the ID locations are used.
12.10 In-Circuit Serial Programming
The PIC12F683 microcontrollers can be serially
programmed while in the end application circuit. This is
simply done with two lines for clock and data and three
other lines for:
• Power
• Ground
• Programming Voltage
DS41211B-page 92
Instruction Flow
Note
Note:
(INTCON<1>)
(INTCON<7>)
the
CLKOUT
Instruction
Instruction
Executed
INTF flag
Fetched
INT pin
GIE bit
1:
2:
3:
4:
OSC1
Code Protection
ID Locations
code
PC
The entire data EEPROM and Flash
program memory will be erased when the
code protection is turned off. See the
PIC12F6XX/16F6XX Memory Program-
ming Specification (DS41204) for more
information.
(4)
XT, HS or LP Oscillator mode assumed.
T
GIE = 1 assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = 0, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
OST
Inst(PC) = Sleep
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
protection
Inst(PC – 1)
= 1024 T
PC
WAKE-UP FROM SLEEP THROUGH INTERRUPT
OSC
(drawing not to scale). This delay does not apply to EC and RCIO Oscillator modes.
bit(s)
Inst(PC + 1)
PC + 1
Sleep
have
Processor in
not
Sleep
PC + 2
been
Preliminary
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
This allows customers to manufacture boards with
unprogrammed devices and then program the micro-
controller just before shipping the product. This also
allows the most recent firmware or a custom firmware
to be programmed.
The device is placed into a Program/Verify mode by
holding the GP0 and GP1 pins low, while raising the
MCLR (V
16F6XX
(DS41204) for more information. GP0 becomes the
programming data and GP1 becomes the program-
ming clock. Both GP0 and GP1 are Schmitt Trigger
inputs in this mode.
After Reset, to place the device into Program/Verify
mode, the Program Counter (PC) is at location 00h. A
6-bit command is then supplied to the device.
Depending on the command, 14 bits of program data
are then supplied to or from the device, depending on
whether the command was a load or a read. For
complete details of serial programming, please refer to
the
Specification” (DS41204).
A typical In-Circuit Serial Programming connection is
shown in Figure 12-11.
PC + 2
“PIC12F6XX/16F6XX
PP
) pin from V
Memory
Dummy Cycle
(3)
PC + 2
IL
Programming
 2004 Microchip Technology Inc.
to V
Dummy Cycle
Inst(0004h)
IHH
0004h
Memory
. See the “PIC12F6XX/
Programming
Specification”
Inst(0005h)
Inst(0004h)
0005h

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