PIC18F46K80-I/P Microchip Technology Inc., PIC18F46K80-I/P Datasheet - Page 170
PIC18F46K80-I/P
Manufacturer Part Number
PIC18F46K80-I/P
Description
40 PDIP .600IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F46K80-I/P
A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
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Quantity
Price
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Part Number:
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20 000
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PIC18F66K80 FAMILY
REGISTER 10-16: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
DS39977C-page 170
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘ 0 ’
RC2IP: EUSART Receive Priority Flag bit
1 = High priority
0 = Low priority
TX2IP: EUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
CTMUIP: CTMU Interrupt Priority bit
1 = High priority
0 = Low priority
CCP2IP: CCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP1IP: ECCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘ 0 ’
U-0
—
W = Writable bit
‘1’ = Bit is set
RC2IP
R/W-1
R/W-1
TX2IP
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CTMUIP
R/W-1
CCP2IP
R/W-1
2011 Microchip Technology Inc.
x = Bit is unknown
CCP1IP
R/W-1
U-0
—
bit 0
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