PIC18F46K80-I/P Microchip Technology Inc., PIC18F46K80-I/P Datasheet - Page 371
PIC18F46K80-I/P
Manufacturer Part Number
PIC18F46K80-I/P
Description
40 PDIP .600IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F46K80-I/P
A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion can start. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see
“A/D Acquisition Requirements”
tion time has elapsed, the A/D conversion can be
started. An acquisition time can be programmed to
occur between setting the GO/DONE bit and the actual
start of the conversion.
To do an A/D conversion, follow these steps:
1.
FIGURE 23-5:
2011 Microchip Technology Inc.
Configure the A/D module:
• Configure the required ADC pins as analog
• Set the voltage reference (ADCON1)
• Select the A/D positive and negative input
• Select the A/D acquisition time (ADCON2)
• Select the A/D conversion clock (ADCON2)
• Turn on the A/D module (ADCON0)
pins (ANCON0 and ANCON1)
channels (ADCON0 and ADCON1)
Legend: C
V
AIN
R
S
V
I
R
SS
C
R
LEAKAGE
T
PIN
IC
HOLD
SS
ANALOG INPUT MODEL
ANx
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
= Sampling Switch Resistance
various junctions
. After this acquisi-
Section 23.3
V
DD
V
V
T
T
= 0.6V
= 0.6V
Preliminary
PIC18F66K80 FAMILY
I
±100 nA
LEAKAGE
2.
3.
4.
5.
6.
7.
R
IC
Configure the A/D interrupt (if desired):
• Clear the ADIF bit (PIR1<6>)
• Set the ADIE bit (PIE1<6>)
• Set the GIE bit (INTCON<7>)
Wait the required acquisition time (if required).
Start the conversion:
• Set the GO/DONE bit (ADCON0<1>)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH:ADRESL)
and, if required, clear bit, ADIF.
For the next conversion, begin with step 1 or 2,
as required.
The A/D conversion time per bit is defined as T
Before the next acquisition starts, a minimum wait
of 2 T
1k
AD
is required.
SS
Sampling
Switch
V
DD
R
SS
Sampling Switch
1
V
SS
C
2
HOLD
3
DS39977C-page 371
= 25 pF
(k)
4
AD
.
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