71M6541D-IGT/F Maxim Integrated Products, 71M6541D-IGT/F Datasheet - Page 97
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
71M6541D-IGT/F
Manufacturer Part Number
71M6541D-IGT/F
Description
PMIC Solutions Precision Energy Meter IC
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet
1.71M6541F-DB.pdf
(165 pages)
Specifications of 71M6541D-IGT/F
Core
8051
Core Architecture
8051
Data Bus Width
8 bit
Data Ram Size
3 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
I2C, ICE, SPI, UART
Maximum Clock Frequency
5 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
30
Number Of Timers
2
On-chip Adc
22 bit
Operating Supply Voltage
3 V to 3.6 V
Package / Case
LQFP-64
Processor Series
8051
Program Memory Size
32 KB
Program Memory Type
Flash
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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4.7
4.7.1 Voltage Reference Precision
Since the VREF band-gap amplifier is chopper-stabilized, as set by the CHOP_E[1:0] (I/O RAM 0x2106[3:2])
control field, the dc offset voltage, which is the most significant long-term drift mechanism in the voltage
references (VREF), is automatically removed by the chopper circuit. Both the 71M654x and the 71M6x01
feature chopper circuits for their respective VREF voltage reference.
Teridian implements a trimming procedure of the VREF voltage reference during the device
manufacturing process.
The reference voltage (VREF) is trimmed to a target value of 1.195V. During this trimming process, the
TRIMT[7:0] (I/O RAM 0x2309) value is stored in non-volatile fuses. TRIMT[7:0] is trimmed to a value that
results in minimum VREF variation with temperature.
For the 71M654x device (±0.5% energy accuracy), the TRIMT[7:0] value can be read by the MPU
during initialization in order to calculate parabolic temperature compensation coefficients suitable for
each individual 71M654x device. The resulting temperature coefficient for VREF in the 71M654x is ±40
ppm/°C.
Considering the factory calibration temperature of VREF to be +22°C and the industrial temperature
range (-40°C to +85°C), the VREF error at the temperature extremes for the 71M654x device can be
calculated as:
The above calculation implies that both the voltage and the current measurements are individually
subject to a theoretical maximum error of approximately ±0.25%. When the voltage sample and current
sample are multiplied together to obtain the energy per sample, the voltage error and current error
combine resulting in approximately ±0.5% maximum energy measurement error. However, this
theoretical ±0.5% error considers only the voltage reference (VREF) as an error source. In practice,
other error sources exist in the system. The principal remaining error sources are the current sensors
(shunts or CTs) and their corresponding signal conditioning circuits, and the resistor voltage divider
used to measure the voltage. The 71M654x 0.5% grade devices should be used in Class 1% designs,
allowing sufficient margin for the other error sources in the system.
4.7.2 Temperature Coefficients for the 71M654x
The equations provided below for calculating TC1 and TC2 apply to the 71M654x (0.5% energy accuracy). In
order to obtain TC1 and TC2, the MPU reads TRIMT[7:0] (I/O RAM 0x2309) and uses the TC1 and TC2
equations provided. PPMC and PPMC2 are then calculated from TC1 and TC2, as shown. The resulting
tracking of the reference voltage (VREF) is within ±40 ppm/°C, corresponding to a ±0.5% energy
measurement accuracy. See
See
v1.1
4.7.3
Metrology Temperature Compensation
and
4.7.4
below for further temperature compensation details.
(
(
−
85
40
© 2008–2011 Teridian Semiconductor Corporation
o
4.7.1 Voltage Reference
o
C
C
TC
−
−
22
22
2
TC
o
=
o
C
C
PPMC
−
1
)
)
PPMC
. 0
⋅
=
⋅
40
557
40
275
ppm
ppm
2
+
−
=
=
2
. 4
/
1150
/
8 .
22
and
o
95
C
o
C
⋅
.
Precision.
10
4632
=
⋅
=
TRIMT
.
+
116
−
−
4
2520
2480
⋅
TRIMT
⋅
TC
⋅
TC
[
ppm
1
: 7
ppm
2
] 0
[
: 7
=
=
+
] 0
−
. 0
. 0
252
248
%
%
97
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