PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 154

• Manufacturer Part Number: PEB3086HV14XP
• Manufacturer: Infineon Technologies

Specifications of PEB3086HV14XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

3.9
The ISAC-SX provides test and diagnostic functions for the S-interface, the D-channel
and each of the two B-channels:
• Digital loop via TLP (Test Loop, TMD and TMB registers) command bit
Figure 80
• Test of layer-2 functions while disabling all layer-1 functions and pins associated with
Data Sheet
The TX path of layer 2 is internally connected with the RX path of layer 2. The output
from layer 1 (S/T) on DD is ignored. This is used for testing ISAC-SX functionality
excluding layer 1 (loopback between XFIFOx and RFIFOx).
them (including clocking) via bit TR_CONF0.DIS_TR. The HDLC controllers can still
operate via IOM-2. DCL and FSC pins become input.
Test Functions
TMx.TLP = ’0’
Layer 2 Test Loops
154
Description of Functional Blocks
TMx.TLP = ’1’
(Figure
PEB 3086
2003-01-30
ISAC-SX
80):