PEF24911HV22XP Lantiq, PEF24911HV22XP Datasheet - Page 30
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PEF24911HV22XP
Manufacturer Part Number
PEF24911HV22XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF24911HV22XP.pdf
(155 pages)
Specifications of PEF24911HV22XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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3
3.1
A functional overview of the DFE-Q V2.1 is given in
processing and frame formatting blocks the PEF 24911 features an on-chip activation/
deactivation controller and programmable general purpose I/O pins for the control of test
relays and power feeding circuits. An application specific DSP core services the four U-
lines and cuts chip size to a minimum.
Figure 8
Data Sheet
4x U
Functional Description
Functional Overview
AFE V2.1
LIU
De te ction for
Bia s, Refer.
Bandgap,
Block Diagram and Data Flow (DFE-Q V2.1 + AFE V2.1)
Wak e Up
Le ve l
ADC
DAC
DFE-Q V2.1
PDM
Filter
DSP
Clock Ge neration
Clocks
Cance lle r
Re cove r y
Tim ing
Echo
+
A
G
C
Equalize r
20
U Protocol Processing Unit
De code r
Encode r
Mode Setting
2B1Q
2B1Q
Mode Pins
Activation/De activation
Scr am ble r
Scr am ble r
Controlle r
De -
Figure
U Fr am ing
Functional Description
Fram ing
U De -
8. Besides the signal
I/O Control
General
Purpose I/Os
Inte rface
Sys te m
SIU
Unit
PEF 24911
2001-07-16
dataflow .v sd
IOM-2
®
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