PEF24911HV22XP Lantiq, PEF24911HV22XP Datasheet - Page 31
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PEF24911HV22XP
Manufacturer Part Number
PEF24911HV22XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF24911HV22XP.pdf
(155 pages)
Specifications of PEF24911HV22XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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3.2
The IOM
communication link to layer-1 and layer-2 backplane devices. It transports user data,
control/programming and status information via dedicated time multiplexed channels.
The structure used follows the 2B + 1 D-channel structure of ISDN. The ISDN-user data
rate of 144 kbit/s (B1 + B2 + D) on the U-interface is transmitted transparently in both
directions (U <=> IOM
Figure 9
The Frame Sync Signal FSC is a 8 kHz signal delimiting the frames. This signal is used
to determine the start of a frame.
The data is clocked by a Data Clock (DCL) which operates at twice the data rate. The
data clock is a square wave signal with a duty cycle ratio of typically 1:1. Incoming data
is sampled on the falling edge of the DCL-clock.
Data is carried over Data Upstream (DU) and Data Downstream (DD) signals. The
upstream and downstream directions are always defined with respect to the exchange:
Downstream refers to information flowing from the exchange to the subscriber, upstream
is defined vice versa.
The output line is operating either as open drain or push-pull output. Both modes are
selected by signal “PUP”. In open drain mode an external pull-up resistor is required. The
absence of a pull-up resistor is not automatically recognized (i.e. no push-pull detection).
Data Sheet
FSC
DU
DD
DCL
®
-2 interface is a four-wire serial interface providing a symmetrical full-duplex
IOM
Clock Supply and Data Exchange between Master and Slave
®
Last Bit of Frame
-2 Interface
IOM
Slave
®
) over the interface.
®
-2
1. Bit of Frame
FSC
DCL
DU
DD
21
2. Bit of Frame
IOM
Master
3. Bit of Frame
Functional Description
®
-2
iomif.emf
PEF 24911
2001-07-16
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