ZL2106ALCF Intersil, ZL2106ALCF Datasheet - Page 11

• Manufacturer Part Number: ZL2106ALCF
• Description: 6A Digital DC-DC Converter W/ DDC - BULK50
• Manufacturer: Intersil
• Series: -r
• Type: Step-Down (Buck), PWM - Voltage Moder

Specifications of ZL2106ALCF

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.54 V ~ 5.5 V
• Current - Output: 6A
• Frequency - Switching: 200kHz ~ 1MHz
• Voltage - Input: 4.5 V ~ 14 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The ZL2106 integrates two N-channel power MOSFETs; QH is the
top control MOSFET and QL is the bottom synchronous MOSFET.
The amount of time that QH is on as a fraction of the total
switching period is known as the duty cycle D, which is described
by Equation 1:
During time D, QH is on and V
inductor. The output current ramps up as shown in Figure 12.
When QH turns off (time 1-D), the current flowing in the inductor
must continue to flow from the ground up through QL, during which
the current ramps down. Since the output capacitor C
low impedance at the switching frequency, the AC component of the
inductor current is filtered from the output voltage so the load sees
nearly a DC voltage.
The maximum conversion ratio is shown in Figure 9. Typically,
buck converters specify a maximum duty cycle that effectively
limits the maximum output voltage that can be realized for a
given input voltage and switching frequency. This duty cycle limit
ensures that the low-side MOSFET is allowed to turn on for a
minimum amount of time during each switching cycle, which
enables the bootstrap capacitor to be charged up and provide
adequate gate drive voltage for the high-side MOSFET.
In general, the size of components L
overall efficiency of the circuit are inversely proportional to the
switching frequency, f
may be realized by switching the MOSFETs at the lowest possible
frequency; however, this will result in the largest component size.
Conversely, the smallest possible footprint may be realized by
switching at the fastest possible frequency but this gives a
somewhat lower efficiency. Each user should determine the
optimal combination of size and efficiency when determining the
switching frequency for each application.
The block diagram for the ZL2106 is illustrated in
Figure 11. In this circuit, the target output voltage is regulated by
connecting the VSEN pin directly to the output regulation point.
The VSEN signal is then compared to an internal reference
voltage that had been set to the desired output voltage level by
the user. The error signal derived from this comparison is
D ≈
V
V
IN
V
OUT
- V
-V
IN
OUT
OUT
0
FIGURE 12. INDUCTOR WAVEFORM
SW
. Therefore, the highest efficiency circuit
D
IN
11
Time
– V
OUT
1
1 - D
and C
is applied across the
OUT
as well as the
OUT
IL
IL
I
O
exhibits
PK
V
(EQ. 1)
ZL2106
converted to a digital value with an analog to digital (A/D)
converter. The digital signal is also applied to an adjustable
digital compensation filter and the compensated signal is used
to derive the appropriate PWM duty cycle for driving the internal
MOSFETs in a way that produces the desired output.
Power Management Overview
The ZL2106 incorporates a wide range of configurable power
management features that are simple to implement without
additional components. Also, the ZL2106 includes circuit protection
features that continuously safeguard the device and load from
damage due to unexpected system faults. The ZL2106 can
continuously monitor input voltage, output voltage/current and
internal temperature. A Power-good output signal is also included to
enable power-on reset functionality for an external processor.
All power management functions can be configured using either
pin configuration techniques (see Figure 13) or via the
I
pre-configured to provide alerts for specific conditions. See
Application Note AN2033 for more details on SMBus monitoring.
Multi-mode Pins
In order to simplify circuit design, the ZL2106 incorporates
patented multi-mode pins that allow the user to easily configure
many aspects of the device without programming. Most power
management features can be configured using these pins. The
multi-mode pins can respond to four different connections, as
shown in Table 1. These pins are sampled when power is applied
or by issuing a PMBus Restore command (See Application Note
AN2033).
PIN-STRAP SETTINGS
This is the simplest method, as no additional components are
required. Using this method, each pin can take on one of three
possible states: LOW, OPEN, or HIGH. These pins can be
connected to the V2P5 pin for logic HIGH settings as this pin
provides a regulated voltage higher than 2V. Using a single pin
one of three settings can be selected.
2
C/SMBus interface. Monitoring parameters can also be
Resistor to SGND
(Logic HIGH)
PIN TIED TO
(Logic LOW)
OPEN
(N/C)
HIGH
TABLE 1. MULTI-MODE PIN CONFIGURATION
LOW
Set by resistor value
No connection
< 0.8VDC
> 2.0VDC
VALUE
FN6852.4