ZL2106ALCF Intersil, ZL2106ALCF Datasheet - Page 22

• Manufacturer Part Number: ZL2106ALCF
• Description: 6A Digital DC-DC Converter W/ DDC - BULK50
• Manufacturer: Intersil
• Series: -r
• Type: Step-Down (Buck), PWM - Voltage Moder

Specifications of ZL2106ALCF

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.54 V ~ 5.5 V
• Current - Output: 6A
• Frequency - Switching: 200kHz ~ 1MHz
• Voltage - Input: 4.5 V ~ 14 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 22. TRACKING CONFIGURATION FOR FIGURES 20 AND 21
ENABLE
Reference
Reference
Reference
Reference
Member
Member
Member
Member
Rail
Rail
Rail
Rail
FIGURE 23. BASIC PIN-STRAP TRACKING CONFIGURATION
(kΩ)
19.6
21.5
23.7
26.1
28.7
31.6
34.8
38.3
56.2
61.9
68.1
82.5
90.9
100
110
R
75
SS
Vout Set
Vout Set
Vout Set
R1
(Volts)
(Volts)
(Volts)
(Volts)
REFERENCE
Vout
Set
1.8
0.9
1.8
1.8
1.8
0.9
1.8
1.8
CFG SS
ZL2106
0.8
EN
Time On
Time On
Time On
Time On
UVLO
5.5
7.5
Tracking Configuration Figure 20 (A)
Tracking Configuration Figure 20 (B)
Tracking Configuration Figure 21 (A)
Tracking Configuration Figure 21 (B)
(ms)
(ms)
(ms)
(ms)
(V)
Dly
Dly
Dly
Dly
15
15
15
15
SW
5
5
5
5
R3
Time On
Time On
Time On
Time On
L1
Rise
(ms)
Rise
(ms)
Rise
(ms)
Rise
(ms)
VOUT_R
5
5
5
5
5
5
5
5
TRACKING RATIO
22
Time Off
Time Off
Time Off
Time Off
(ms)
(ms)
(ms)
(ms)
Dly
Dly
Dly
Dly
100
100
15
15
15
15
(%)
50
50
5
5
5
5
R2
VTRK
MEMBER
CFG SS
ZL2106
Time Off
Time Off
Time Off
Time Off
EN
( ms)
( ms)
( ms)
( ms)
Fall
Fall
Fall
Fall
5
5
5
5
5
5
5
5
SW
TABLE 13. TRACKING MODE CONFIGURATION
R4
Track 50% VTRK Limited
Track 50% Vout Limited
Limited by target voltage
Limited by target voltage
Limited by target voltage
Limited by target voltage
Limited by VTRK pin voltage
Limited by VTRK pin voltage
Limited by VTRK pin voltage
Limited by VTRK pin voltage
100% VTRK Limited
100% Vout Limited
Track Disabled
Track Disabled
Track Disabled
Track Disabled
L2
Mode
Mode
Mode
Mode
VOUT_M
UPPER TRACK LIMIT
ZL2106
Tracking Configured by Pin-Strap
Tracking is enabled with the CFG pin as shown in Table 16 on
page 24, and configured to a specific ramp rate using the SS pin,
as shown in Table 13 on page 22. Figure 23 shows the basic
schematic of pin-strap tracking.
Voltage Margining
The ZL2106 offers a simple means to vary its output higher or
lower than its nominal voltage setting in order to determine
whether the load device is capable of operating over its specified
supply voltage range. The MGN command is set by driving the
MGN pin or through the I
tri-level input that is continuously monitored and can be driven
directly by a processor I/O pin or other logic-level output.
The ZL2106’s output will be forced higher than its nominal set
point when the MGN command is set HIGH, and the output will
be forced lower than its nominal set point when the MGN
command is set LOW. Default margin limits of V
loaded in the factory, but the margin limits can be modified
through the I
low as 0V, where V
determined by the VSET pin. The ZL2106-01 allows 150% margin
limits.
The margin limits and the MGN command can both be set
individually through the I
transition rate between the nominal output voltage and either
margin limit can be configured through the I
Please refer to Application Note AN2033 for detailed instructions
on modifying the margining configurations.
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
Output not allowed to decrease before PG
Output will always follow VTRK
2
C/SMBus interface to as high as V
NOM
is the nominal output voltage set point
RAMP-UP/DOWN BEHAVIOR
2
2
C/SMBus interface. The MGN pin is a
C/SMBus interface. Additionally, the
2
C/SMBus interface.
NOM
NOM
±5% are pre-
+ 10% or as
FN6852.4