CS8952-CQ Cirrus Logic Inc, CS8952-CQ Datasheet - Page 70

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CS8952-CQ

Manufacturer Part Number
CS8952-CQ
Description
IC ETHNT 10/100 TXRX 5V 100-TQFP
Manufacturer
Cirrus Logic Inc
Type
Transceiverr
Datasheet

Specifications of CS8952-CQ

Mounting Type
Surface Mount
Protocol
MII
Voltage - Supply
4.75 V ~ 5.25 V
Package / Case
100-TQFP, 100-VQFP
Peak Reflow Compatible (260 C)
No
Supply Voltage
5V
Supply Voltage Max
5V
Transceiver Type
Ethernet
Leaded Process Compatible
No
No. Of Drivers
6
Interface Type
MII
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1205

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RX_DV/MII_DRV - Receive Data Valid/MII Drive Strength. Input/Tri-State Output, Pin 33.
RX_EN - Receive Enable. Input, Pin 14.
70
In order to conform with Annex 22B of the IEEE 802.3u specification, the MII_DRV pin should be pulled
high during power-up or reset, and the RX_CLK pin should have an external 33
systems not required to drive external connectors and cables as described in the IEEE802.3u
specification, the external series resistor may not be necessary.
Asserted high to indicate valid data nibbles are present on RXD[3:0].
At power-up or at reset, this pin is used as an input to determine the drive strength of the MII output
drivers. When the pin is low, all MII output drivers will be standard 4 mA CMOS drivers. When high,
additional drive strength will be added to the MII output drivers. This pin includes a weak internal pull-
down (> 20 K ), or the value may be set by an external 4.7 K pull-up or pull-down resistor.
In order to conform with Annex 22B of the IEEE 802.3u specification, this pin should be pulled high
during power-up or reset and should have an external 33
drive external connectors and cables as described in the IEEE802.3u specification, it may be possible to
reduce overall power consumption by pulling the pin low at power-up or reset, and the external series
resistor may not be necessary.
When high, signals RXD[3:0], RX_CLK, RX_DV, and RX_ER are enabled. When low, these signals are
tri-stated. RX_EN allows the received data signals of multiple PHY transceivers to share the same MII
bus.
This pin includes a weak internal pull-up (> 150 K ), or the value may be set by an external 10 K pull-
up or pull-down resistor.
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
series resistor. For systems not required to
series resistor. For
CS8952

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