Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 135

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

PS028702-1210
Receiving Data using the Interrupt-Driven Method
6. Read data from the LIN-UART receive data register. If operating in
7. Return to Step 5 to receive additional data.
The LIN-UART receiver interrupt indicates the availability of new data (as well as error
conditions). Observe the following steps to configure the LIN-UART receiver for inter-
rupt-driven operation:
1. Write to the LIN-UART baud rate high and low byte registers to set the appropriate
2. Enable the LIN-UART pin functions by configuring the associated GPIO port pins for
3. Execute a
4. Write to the interrupt control registers to enable the LIN-UART receiver interrupt and
5. Clear the LIN-UART receiver interrupt in the applicable Interrupt Request Register.
6. Write to the LIN-UART Control 1 Register to enable MULTIPROCESSOR (9-bit)
7. Write the device address to the address compare register (automatic multiprocessor
8. Write to the LIN-UART Control 0 Register to:
9. Execute an
The LIN-UART is now configured for interrupt-driven data reception. When the LIN-
UART receiver interrupt is detected, the associated ISR performs the following:
MULTIPROCESSOR (9-bit) mode, further actions are required depending on the
MULTIPROCESSOR mode bits
baud rate.
alternate function operation.
set the appropriate priority.
mode functions:
a. Set the MULTIPROCESSOR mode select (MPEN) to enable MULTIPROCES-
b. Set the MULTIPROCESSOR mode bits, MPMD[1:0], to select the appropriate
c. Configure the LIN-UART to interrupt on received data and errors or errors only
modes only).
a. Set the receive enable bit (
b. Enable parity, if MULTIPROCESSOR mode is not enabled and select either even-
SOR mode.
address matching scheme.
(interrupt on errors only is unlikely to be useful for Z16FMC devices without a
DMA block).
or odd-parity.
DI
EI
instruction to disable interrupts.
instruction to enable interrupts.
P R E L I M I N A R Y
REN
MPMD
) to enable the LIN-UART for data reception
[1:0].
Z16FMC Series Motor Control MCUs
Product Specification
LIN-UART
113