Z16FMC64AG20SG Zilog, Z16FMC64AG20SG Datasheet - Page 81

• Manufacturer Part Number: Z16FMC64AG20SG
• Description: Microcontrollers (MCU) 16BIT 64K FL 4K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC64AG20SG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: 0 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / Rohs Status: Details

Table 36. IRQ0 Enable High Bit Register (IRQ0ENH)
PS028702-1210
Bits
Field
RESET
R/W
ADDR
Bits
7
6
5
4
3
2
1
0
IRQ0 Enable High and Low Bit Registers
Description
T2ENH
Timer 2 Interrupt Request Enable High Bit.
T1ENH
Timer 0 Interrupt Request Enable High Bit.
T0ENH
Timer 0 Interrupt Request Enable High Bit.
U0RENH
UART 0 Receive Interrupt Request Enable High Bit.
U0TENH
UART 0 Transmit Interrupt Request Enable High Bit.
I2CENH
I
SPIENH
SPI Interrupt Request Enable High Bit.
ADCENH
ADC Interrupt Request Enable High Bit.
2
C Interrupt Request Enable High Bit.
T2ENH
R/W
7
0
The IRQ0 enable high and low bit registers (shown in Tables 36 and 37) form a priority
encoded enabling for interrupts in the Interrupt Request 0 Register. Priority is generated
by setting bits in each register. Table 35 describes the priority control for IRQ0.
Table 35. IRQ0 Enable and Priority Encoding
Note: x indicates the register bits from 0 through 7.
IRQ0ENH[x]
0
0
1
1
T1ENH
R/W
6
0
IRQ0ENL[x] Priority
T0ENH
R/W
5
0
0
1
0
1
P R E L I M I N A R Y
U0RENH
Disabled
Level 1
Level 2
Level 3
R/W
4
0
FF_E032H
U0TENH
R/W
Z16FMC Series Motor Control MCUs
3
0
Description
Disabled
Low
Nominal
High
I2CENH
R/W
2
0
Product Specification
SPIENH
R/W
Interrupt Controller
1
0
ADCENH
R/W
0
0
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