ADV7180BSTZ Analog Devices Inc, ADV7180BSTZ Datasheet - Page 68

IC VIDEO DECODER SDTV 64-LQFP

ADV7180BSTZ

Manufacturer Part Number
ADV7180BSTZ
Description
IC VIDEO DECODER SDTV 64-LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of ADV7180BSTZ

Design Resources
Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
Applications
Digital Cameras, Mobile Phones, Portable Video
Voltage - Supply, Analog
1.71 V ~ 1.89 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Resolution (bits)
10bit
Input Format
Analog
Output Format
Digital
Adc Sample Rate
57.27MSPS
Power Dissipation Pd
15µW
No. Of Input Channels
6
Supply Voltage Range
1.71V To 1.89V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADV7180LQEBZ - BOARD EVALUATION ADV7180EVAL-ADV7180LFEBZ - BOARD EVAL FOR ADV7180 LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7180BSTZ
Manufacturer:
AMIS
Quantity:
6 240
Part Number:
ADV7180BSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADV7180BSTZ
Manufacturer:
ADI
Quantity:
8 000
Part Number:
ADV7180BSTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADV7180BSTZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADV7180
Gemstar Bit Names
The following are the Gemstar bit names:
Table 88. Gemstar_2× Data, Half-Byte Mode
Byte
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DID—The data identification value is 0x140 (10-bit value).
Care has been taken so that in 8-bit systems, the two LSBs
do not carry vital information.
EP and EP —The EP bit is set to ensure even parity on the
D[8:0] data-word. Even parity means there is always an
even number of 1s within the D[8:0] bit arrangement. This
includes the EP bit. EP describes the logic inverse of EP
and is output on D[9]. The EP is output to ensure that the
reserved codes of 00 and FF do not occur.
EF—Even field identifier. EF = 1 indicates that the data was
recovered from a video line on an even field.
2×—This bit indicates whether the data sliced was in
Gemstar 1× or 2× format. A high indicates 2× format.
The 2× bit determines whether the raw information
retrieved from the video line was two bytes or four bytes.
The state of the GDECAD bit affects whether the bytes are
transmitted straight (that is, two bytes transmitted as two
bytes) or whether they are split into nibbles (that is, two
bytes transmitted as four half bytes). Padding bytes are
then added where necessary.
Line[3:0]—This entry provides a code that is unique for
each of the possible 16 source lines of video from which
Gemstar data may have been retrieved. Refer to Table 96
and Table 97.
D[9]
0
1
1
0
EP
EP
EP
EP
EP
EP
EP
EP
EP
EP
CS[8]
D[8]
0
1
1
1
EP
EP
EP
EP
EP
EP
EP
EP
EP
EP
CS[8]
D[7]
0
1
1
0
EF
0
0
0
0
0
0
0
0
0
CS[7]
D[6]
0
1
1
1
1
0
0
0
0
0
0
0
0
0
CS[6]
0
1
1
0
0
CS[5]
D[5]
Rev. F | Page 68 of 116
Gemstar Word1[7:4]
Gemstar Word1[3:0]
Gemstar Word2[7:4]
Gemstar Word2[3:0]
Gemstar Word3[7:4]
Gemstar Word3[3:0]
Gemstar Word4[7:4]
Gemstar Word4[3:0]
0
1
1
0
0
CS[4]
D[4]
Line[3:0]
CS [8]—describes the logic inversion of CS[8]. The value CS [8]
is included in the checksum entry of the data packet to ensure
that the reserved values of 0x00 and 0xFF do not occur.
Table 88 to Table 91 outline the possible data packages.
Gemstar_2× Format, Half-Byte Output Mode
Half-byte output mode is selected by setting GDECAD to 0;
full-byte output mode is selected by setting GDECAD to 1. See
the GDECAD, Gemstar Decode Ancillary Data Format,
Address 0x4C[0] section.
Gemstar_1× Format
Half-byte output mode is selected by setting CDECAD to 0,
full-byte output mode is selected by setting CDECAD to 1. See
the GDECAD, Gemstar Decode Ancillary Data Format,
Address 0x4C[0] section.
0
1
1
1
CS[3]
D[3]
0
DC[1:0]—Data count value. The number of UDWs in the
packet divided by 4. The number of UDWs in any packet
must be an integral number of 4. Padding may be required
at the end, as set in ITU-R BT.1364. See Table 87.
CS[8:2]—The checksum is provided to determine the
integrity of the ancillary data packet. It is calculated by
summing up D[8:2] of DID, SDID, the data count byte, and
all UDWs and ignoring any overflow during the summation.
Because all data bytes that are used to calculate the checksum
have their two LSBs set to 0, the CS[1:0] bits are also always 0.
0
1
1
CS[2]
D[2]
0
0
CS[1]
D[1]
0
1
1
0
0
0
0
0
0
0
0
0
0
0
CS[0]
D[0]
0
1
1
0
0
0
0
0
0
0
0
0
0
0
Checksum
Description
Fixed preamble
Fixed preamble
Fixed preamble
DID
SDID
Data count
User data-words
User data-words
User data-words
User data-words
User data-words
User data-words
User data-words
User data-words

Related parts for ADV7180BSTZ