DS33X11+ Maxim Integrated Products, DS33X11+ Datasheet - Page 27

• Manufacturer Part Number: DS33X11+
• Description: IC MAPPING ETHERNET 144CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X11+

• Applications: Data Transport
• Interface: SPI
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 144-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev: 063008
TCLK5/TMCLK2
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
TMSYNC1
TMSYNC2
TMSYNC3
TMSYNC4
RDATA10
RDATA11
RDATA12
RDATA13
RDATA14
RDATA15
RDATA16
TSYNC1/
TSYNC5/
TMCLK3
TMCLK4
TSYNC2
TSYNC3
TSYNC4
TSYNC6
TSYNC7
TSYNC8
RDATA1
RDATA2
RDATA3
RDATA4
RDATA5
RDATA6
RDATA7
RDATA8
RDATA9
TCLK6
TCLK7
TCLK8
NAME
PACKAGE PINS
M10
P10
R10
T11
T12
N14
256
T10
M7
M6
R6
R7
N8
D1
G8
G4
H2
N1
R1
N3
N4
T8
P7
P8
T9
F3
F2
K1
L1
K2
K3
L4
P2
144
M4
J2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TYPE
I
I
Transmit Master Clock (TMCLK[1:4]). Input clock that TDATA is
referenced to. This clock may be gapped. Maximum clock speed is
52MHz. This clock can be inverted.
Not all serial port signals are available on all products in the device family.
Unused input pins should be tied to VSS.
DS33X41/X42/W41/W11: TCLK5 – TCLK8 not used.
Transmit Synchronization Input (TSYNC[1:8]). Input that indicates
frame boundaries on TDATA, referenced to TCLK. This signal may be a
frame or multiframe sync. It must be a multiframe sync for VCAT
applications. Data is octet aligned to this signal.
Note that TSYNC1 is also TMSYNC1, TSYNC5 is also TMSYNC2.
TMSYNC3 and TMSYNC4 are stand-alone pins.
Transmit Master Sync (TMSYNC[1:4]). This input indicates frame
boundaries on TDATA if selected via LI.TCR.TD_SEL, referenced to
TMCLK1.
Not all serial port signals are available on all products in the device family.
Unused input pins should be tied to VSS.
DS33X41/X42/W41/W11: TSYNC5 – TTSYNC8 not used.
Receive Serial Data Input (RDATA[1:16]). Receive Serial data from a
T1/E1/T3/E3/xDSL Framer. Data input on the rising edge of RCLK.
Not all serial port signals are available on all products in the device family.
Unused input pins should be tied to VSS.
DS33X41/X42/W41/W11: RDATA5 – RDATA16 not used.
DS33X81/X82: RDATA9 – RDATA16 not used.
FUNCTION
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