DS33X11+ Maxim Integrated Products, DS33X11+ Datasheet - Page 370

• Manufacturer Part Number: DS33X11+
• Description: IC MAPPING ETHERNET 144CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X11+

• Applications: Data Transport
• Interface: SPI
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 144-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.
14.1 DS33X162/X161/X82/X81/X42/X41 Pin Configuration—256-Ball CSBGA
A
B
C
D
E
F
G
H
J
K
L
M RSYNC10
N
P
R
T
Note: Shaded pins do not apply to all devices in the product family. See the pin listing for specific pin availability. In the high port
count devices, the shaded input pins DO NOT HAVE PULLUP/PULLDOWN resistors. Consideration must be taken during
board design to bias the inputs appropriately, and to float output pins (TDATA5-TDATA16, TX_EN2, TX_ERR2) if lower port
count designs are to be potentially stuffed with higher port count devices.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
RSYNC12 RDATA13 RSYNC15
RDATA11
RDATA14 RSYNC14
RSYNC1
RSYNC4
RDATA1
RDATA7
RDATA8
RCLK14
RCLK1
RCLK3
RCLK6
JTCLK
JTRST
JTMS
1
Pin Configuration
RDATA6
RSYNC3
RDATA9
RSYNC8 RSYNC11 RDATA12
RDATA4
RCLK10
RCLK11
RCLK12
SDA[3]
SDA[2]
SDA[1]
JTDO
JTDI
DNC
2
RSYNC16
RDATA10 RSYNC9
RDATA15 RDATA16 RSYNC7
RSYNC5
RSYNC6
RDATA5
RCLK16
SDA[10]
VDD1.8
VDD1.8
RCLK9
SBA[1]
SDA[0]
SDA[4]
3
SD_CLKE
RSYNC13
RDATA3
RCLK15
VDD1.8
VDD3.3
RCLK5
RCLK4
RCLK8
SBA[0]
SDA[5]
SDCS
VSS
N
4
TDATA5
SDA[12]
RCLK13
VDD2.5
VDD3.3
VDD3.3
SDA[6]
SDA[7]
SDA[8]
RCLK7
TCLK2
TCLK1
AVDD
VSS
VSS
5
SPI_MISO
SPI_MOSI
TSYNC3
TDATA6
TDATA3
TSYNC1
TDATA1
SDA[11]
SDA[9]
VSSQ
VSSQ
SRAS
DNC
DNC
VSS
VSS
D0 /
D1 /
6
SD_UDM SD_UDQS SDATA[8]
RSYNC2
SPI_CLK
TDATA7
TSYNC4
TSYNC5
TDATA2
VDD2.5
VDD3.3
RCLK2
TCLK5
SCAS
SWE
VSS
ALE
D2 /
D3
7
SD_CLK
RDATA2
D5 /SPI_
TSYNC7
TSYNC6
TSYNC2
VDD2.5
VDD3.3
TCLK3
SWAP
VSSQ
DNC
VSS
RST
CS
D4
8
SPI_CPHA
SPI_CPOL
SDATA[9] SDATA[11] SDATA[14] SDATA[5] SD_LDQS
TSYNC8
SD_CLK
TDATA4
TDATA8
VDD3.3
RD / DS
TCLK4
VREF
VSS
VSS
VSS
D6 /
D7 /
A1
9
SDATA[12] SDATA[13] SDATA[15] SDATA[7]
WR / RW
TMCLK4
TDATA9
VDD3.3
TCLK6
TCLK8
TCLK7
VDDQ
VSS
VSS
VSS
A8
A0
A3
10
TDATA11 TDATA15 RX_CLK2 TMSYNC4
TDATA16 TDATA14 DCEDTES TDATA13
TDATA10 TDATA12
RX_DV2
TMCLK3 TMSYNC3 REF_CLK
VDD1.8 SDATA[10] SD_LDM
VDD1.8
VDDQ
AVSS
VSS
A10
INT
A2
A5
11
RX_ERR2
VDD3.3
VDD1.8
VDD1.8
VDD1.8
MODE
VDDQ
12
A6
A7
SDATA[6] SDATA[4]
RX_CRS1
RXD[1] /
RXD1[1]
TXD[3] /
TXD1[3]
TXD[0] /
TXD1[0]
VDD1.8
MDIO
VSS
13
A4
A9
RX_CRS2
TX_ERR1
RMII_SEL TX_CLK1
GTX_CLK
RXD[2] /
RXD1[2]
RXD[0] /
RXD1[0]
RXD[3] /
RXD1[3]
TX_EN1
VDD3.3
VSSQ
VDDQ
VDDQ
COL1
14
RX_ERR1
SDATA[2] SDATA[1]
SDATA[3] SDATA[0]
RX_DV1
RXD[6] /
RXD2[2]
TXD[2] /
TXD1[2]
TXD[1] /
TXD1[1]
TXD[4] /
TXD2[0]
TXD[5] /
TXD2[1]
TXD[6] /
TXD2[2]
TXD[7] /
TXD2[3]
370 of 375
VDDQ
VSSQ
VSSQ
MDC
15
RX_CLK1
TX_ERR2
TX_CLK2
SYSCLKI
SPI_SEL
RXD[7] /
RXD2[3]
RXD[5] /
RXD2[1]
RXD[4] /
RXD2[0]
TX_EN2
VDDQ
VSSQ
COL2
VSS
HIZ
16