NS7520B-1-C36 Digi International, NS7520B-1-C36 Datasheet - Page 38

• Manufacturer Part Number: NS7520B-1-C36
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-C36

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

JTAG test (ARM debugger)
2 6
P i n o u t d e t a i l t a b l e s a n d s i g n a l d e s c r i p t i o n s
JTAG boundary scan allows a tester to check the soldering of all signal pins and tri-
state all outputs.
Table 13: JTAG test pinout
Signal descriptions
Table 14: ARM debugger signal description
TDI
TDO
TMS
TRST_
TCK
TDI
TDO
TMS
Symbol
Mnemonic
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
Test data in
Test data out
Test mode select
Signal
N14 U
M13
M12 U
M14
P15
Pin
I
O
I
I
I
I/O
2
TDI operates the JTAG standard. Consult the JTAG
specifications for use in boundary-scan testing. These
signals meet the requirements of the Raven and Jeeni
debuggers.
TDO operates the JTAG standard. Consult the JTAG
specifications for use in boundary-scan testing. These
signals meet the requirements of the Raven and Jeeni
debuggers.
TMS operates the JTAG standard. Consult the JTAG
specifications for use in boundary-scan testing. These
signals meet the requirements of the Raven and Jeeni
debuggers.
OD
Description
Test data in
Test data out
Test mode select
Test mode reset
Requires external termination when not being
used (see Figure 4, "TRST_ termination," on
page 27 for an illustration of the termination
circuit on the development PCB).
Test mode clock
Add an external pullup to 3.3V.
Description