DS33ZH11+ Maxim Integrated Products, DS33ZH11+ Datasheet - Page 88
DS33ZH11+
Manufacturer Part Number
DS33ZH11+
Description
IC MAPPER ETHERNET 100CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33Z11.pdf
(172 pages)
Specifications of DS33ZH11+
Applications
Data Transport
Interface
Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
100-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Performance Monitor Update Status Latched (PMSL) This bit is set when the PMS bit transitions from 0
to 1.
Bit 2: Bit Error Detected Latched (BEL) This bit is set when a bit error is detected.
Bit 1: Bit Error Count Latched (BECL) This bit is set when the BEC bit transitions from 0 to 1.
Bit 0: Out Of Synchronization Latched (OOSL) This bit is set when the OOS bit changes state.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Performance Monitoring Update Status Interrupt Enable (PMSIE) This bit enables an interrupt if the
PMSL bit is set.
Bit 2: Bit Error Interrupt Enable (BEIE) This bit enables an interrupt if the BEL bit is set.
Bit 1: Bit Error Count Interrupt Enable (BECIE) This bit enables an interrupt if the BECL bit is set.
Bit 0: Out Of Synchronization Interrupt Enable (OOSIE) This bit enables an interrupt if the OOSL bit is set.
7
7
0
-
-
-
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
6
6
0
-
-
-
BSRL
BERT Status Register Latched
8Eh
BSRIE
BERT Status Register Interrupt Enable
90h
5
5
0
-
-
-
88 of 172
4
4
0
-
-
-
PMSIE
PMSL
3
3
0
-
BEIE
BEL
2
2
0
-
BECIE
BECL
1
1
0
-
OOSIE
OOSL
0
0
0
-
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