ISP1562BEGE ST-Ericsson Inc, ISP1562BEGE Datasheet - Page 62

IC USB PCI HOST CTRLR 100-LQFP

ISP1562BEGE

Manufacturer Part Number
ISP1562BEGE
Description
IC USB PCI HOST CTRLR 100-LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1562BEGE

Applications
USB Host/Function Processor
Interface
EHCI Interface
Voltage - Supply
3 V ~ 3.6 V
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3157
ISP1562BE

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1562BEGE
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
NXP Semiconductors
Table 92.
Address: Content of the base address register + 08h
Table 93.
Address: Content of the base address register + 20h
ISP1562_2
Product data sheet
Bit
3 to 2
1
0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Symbol
reserved
PFLF
64AC
HCCPARAMS - Host Controller Capability Parameters register bit description
USBCMD - USB Command register bit allocation
11.2.4 HCSP-PORTROUTE register
11.3.1 USBCMD register
11.3 Operational registers of enhanced USB Host Controller
R/W
R/W
31
23
0
0
Description
-
Programmable Frame List Flag: Default = implementation-dependent. If this bit is cleared, the
system software must use a frame list length of 1024 elements with the Host Controller. The
USBCMD register FLS[1:0] (bits 3 and 2) is read-only and must be cleared. If PFLF is set, the system
software can specify and use a smaller frame list, and configure the host through the FLS bit. The
frame list must always be aligned on a 4 kB page boundary to ensure that the frame list is always
physically contiguous.
64-bit Addressing Capability: This field contains the addressing range capability.
0 — Data structures using 32-bit address memory pointers.
1 — Data structures using 64-bit address memory pointers.
The HCSP-PORTROUTE (Companion Port Route Description) register is an optional
read-only field that is valid only if PRR (bit 7 in the HCSPARAMS register) is logic 1. Its
address is content of the base address register + 0Ch.
This field is a 15-element nibble array, each four bits is one array element. Each array
location corresponds one-to-one with a physical port provided by the Host Controller. For
example, PORTROUTE[0] corresponds to the first PORTSC port, PORTROUTE[1] to the
second PORTSC port, and so on. The value of each element indicates to which of the
companion Host Controllers this port is routed. Only the first N_PORTS elements have
valid information. A value of zero indicates that the port is routed to the lowest numbered
function companion Host Controller. A value of one indicates that the port is routed to the
next lowest numbered function companion Host Controller, and so on.
The USB Command (USBCMD) register indicates the command to be executed by the
serial Host Controller. Writing to this register causes a command to be executed.
shows the bit allocation.
R/W
R/W
30
22
0
0
R/W
R/W
29
21
0
0
Rev. 02 — 1 March 2007
R/W
R/W
28
20
0
0
reserved
ITC[7:0]
[1]
R/W
R/W
27
19
0
1
R/W
R/W
26
18
0
0
HS USB PCI Host Controller
…continued
R/W
R/W
25
17
0
0
© NXP B.V. 2007. All rights reserved.
ISP1562
Table 93
R/W
R/W
24
16
0
0
61 of 93

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