KIT_TC1797_SK Infineon Technologies, KIT_TC1797_SK Datasheet - Page 98

• Manufacturer Part Number: KIT_TC1797_SK
• Description: KIT STARTER AUDO FUTURE TC1797
• Manufacturer: Infineon Technologies
• Series: Audo Futurer
• Type: MCUr

Specifications of KIT_TC1797_SK

• Contents: Board, Adapters, Cables, CD, Power Supply
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TC1797
• Other names: KITTC1797SKIN

PORTS_TC.H004 Using LVDS Ports in CMOS Mode
The following constraint applies to an LVDS pair used in CMOS mode:
Only one pin of a pair shall be used as output, the other shall be used as input.
Using both pins as outputs or inputs simultaneously is not allowed because of
the cross-coupling between them.
PORTS_TC.H005 Pad Input Registers do not capture Boundary-Scan data
when BSD-mode signal is set to high
The principle of Boundary-Scan is that the BSD-cells can overrule the input and
output data for all functional system components (including port-input
registers).
In current implementation the peripheral port input registers(P<n>_IN) are
however capturing the direct pad-input data even when the BSD-mode signal is
set to high.
This limits the usage of INTEST.
Work around:
In case of INTEST, do not read port input registers.
PWR_TC.H005 Current Peak on V
During power-up, a current peak may be observed on V
internal cross currents generated by level shifters whose state is undefined until
the core voltage reaches at least 0.5V. This effect is statistical and may vary
from one device to the other, upon operating conditions, etc. This effect may
only occur during power-up. It can not happen during power-down or power-fail.
The following table classifies the V
TC1797, EES-AC, ES-AC, AC
DD
/V
DDP
98/101
DDP
during Power-up
ranges with respect to peak severity.
DDP
. It is caused by
Application Hints
Rel. 1.3, 18.12.2009
Errata Sheet