WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 151
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
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Intel
10.2.1.3.4
Note:
10.2.1.3.5
®
5 Series Express Chipset MAC Programming Interface—82577 GbE PHY
Packet Split Receive Control Register - PSRCTL (0x02170)
If software sets a buffer size to zero, all buffers following that one must be set to zero
as well. Pointers in the receive descriptors to buffers with a zero size should be set to
anything but NULL pointers.
Flow Control Receive Threshold Low - FCRTL (0x02160; RW)
This register contains the receive threshold used to determine when to send an XON
packet. It counts in units of bytes. The lower three bits must be programmed to zero
(8-byte granularity). Software must set XONE to enable the transmission of XON
frames. Each time hardware crosses the receive high threshold (becoming more full),
and then crosses the receive low threshold and XONE is enabled (= 1b), hardware
transmits an XON frame.
Note that flow control reception/transmission are negotiated capabilities by the auto-
negotiation process. When the MAC is manually configured, flow control operation is
determined by the RFCE and TFCE bits of the Device Control register.
6:0
7
13:8
15:14
21:16
23:22
29:24
31:30
2:0
15:3
30:16
31
Bit
Bit
RW
RO
RW
RW
RW
RO
RO
RO
RO
RW
RO
RW
Type
Type
0x2
0b
0x4
00b
0x4
00b
0x0
00b
0x0
0x0
0b
0x0
Reset
Reset
Receive Buffer Size for Buffer 0 (BSIZE0).
The value is in 128-byte resolution. Value can be from 128 bytes to 16256
bytes (15.875 KB). Default buffer size is 256 bytes. Software should not
program this field to a zero value.
Reserved. Should be written with 0b to ensure future compatibility.
Receive Buffer Size for Buffer 1 (BSIZE1).
The value is in 1 KB resolution. Value can be from 1 KB to 63 KB. Default
buffer size is 4 KB. Software should not program this field to a zero value.
Reserved. Should be written with 0b to ensure future compatibility.
Receive Buffer Size for Buffer 2 (BSIZE2).
The value is in 1 KB resolution. Value can be from 1 KB to 63 KB. Default
buffer size is 4 KB. Software might program this field to any value.
Reserved. Should be written with 0b to ensure future compatibility.
Receive Buffer Size for Buffer 3 (BSIZE3).
The value is in 1 KB resolution. Value can be from 1 KB to 63 KB. Default
buffer size is 0 KB. Software might program this field to any value.
Reserved. Should be written with 0b to ensure future compatibility.
Reserved. The underlying bits might not be implemented in all versions of
the chip. Must be written with 0b.
Receive Threshold Low (RTL). FIFO low water mark for flow control
transmission.
Reserved. Reads as 0b. Should be written to 0b for future compatibility.
XON Enable (XONE).
0b = Disabled.
1b = Enabled.
Description
Description
144
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