WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 88

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WG82577LM S LGWR

Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet

Specifications of WG82577LM S LGWR

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 65.
8.9.1
81
LED Configuration PHY Address 01, Page 0, Register 30
NOTES:
1. When LED Blink mode is enabled the appropriate Led Invert bit should be set to zero.
2. The dynamic LED's modes (LINK/ACTIVITY and ACTIVITY) should be used with LED Blink mode enabled.
Interrupts
The 82577 maintains status bits (per interrupt cause) to reflect the source of the
interrupt request. System software is expected to clear these status bits once the
interrupt is being handled.
Blink rate
LED2 Blink
LED2 Invert
LED2 Mode
LED1 Blink
LED1 Invert
LED1 Mode
LED0 Blink
LED0 Invert
LED0 Mode
Name
0b
0b
0b
110b
0b
0b
111b
1b
0b
100b
Default
15
14
13
12:10 Mode specifying what event/state/pattern is displayed on LED2.
9
8
7:5
4
3
2:0
Bits
Specifies the blink mode of the LEDs.
0b = Blinks at 200 ms on and 200 ms off.
1b = Blinks at 83 ms on and 83 ms off.
LED2_BLINK Field
0b = No blinking.
1b = Blinking.
LED2_IVRT Field
0b = Active low output.
1b = Active high output.
LED1_BLINK Field
0b = No blinking.
1b = Blinking.
LED1_IVRT Field
0b = Active low output.
1b = Active high output.
Mode specifying what event/state/pattern is displayed on LED1.
LED0_BLINK Field
0b = No blinking.
1b = Blinking.
LED0_IVRT Field
0b = Active low output.
1b = Active high output.
Mode specifying what event/state/pattern is displayed on LED0.
Description
82577 GbE PHY—Programmer’s Visible State
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Type

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