WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 4
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
Lead Free Status / Rohs Status
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7.0
8.0
9.0
10.0 Intel
11.0 Electrical and Timing Specifications ....................................................................... 169
iv
Device Functionality.................................................................................................33
7.1
7.2
7.3
7.4
7.5
Programmer’s Visible State......................................................................................47
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
Non-Volatile Memory (NVM) ....................................................................................93
9.1
9.2
9.3
9.4
10.1
10.2
11.1
11.2
11.3
11.4
11.5
®
Tx Flow ............................................................................................................33
Rx Flow ............................................................................................................33
Flow Control......................................................................................................33
7.3.1
7.3.2
Wake Up ..........................................................................................................35
7.4.1
7.4.2
PHY Loopback ...................................................................................................45
Terminology......................................................................................................47
MDIO Access .....................................................................................................48
Addressing........................................................................................................48
Address Map .....................................................................................................49
PHY Registers (Page 0) .......................................................................................51
8.5.1
Port Control Registers (Page 769) ........................................................................74
Statistics Registers ............................................................................................75
PCIe Registers...................................................................................................77
General Registers ..............................................................................................79
8.9.1
Wake Up Registers.............................................................................................82
8.10.1 Accessing Wake Up Registers Using MDIC ..................................................82
8.10.2 Host Wake Up Control Status Register Description.......................................83
Introduction ......................................................................................................93
NVM Programming Procedure Overview ................................................................93
LAN NVM Format and Contents ............................................................................95
9.3.1
9.3.2
9.3.3
Intel
Register Byte Ordering ..................................................................................... 115
Register Conventions ....................................................................................... 116
10.2.1 PCI Configuration and Status Registers - CSR Space.................................. 117
Introduction .................................................................................................... 169
Operating Conditions........................................................................................ 169
11.2.1 Absolute Maximum Ratings .................................................................... 169
11.2.2 Recommended Operating Conditions ....................................................... 170
11.2.3 ESD Specifications ................................................................................ 170
Power Delivery ................................................................................................ 170
11.3.1 Voltage Regulator Power Supply Specifications ......................................... 170
11.3.2 Power Detection Threshold..................................................................... 172
I/O DC Parameters .......................................................................................... 172
11.4.1 3.3 Vdc I/O.......................................................................................... 172
11.4.2 3.3 Vdc I/O.......................................................................................... 173
11.4.3 Input Buffer Only.................................................................................. 174
11.4.4 PCIe DC/AC Specifications ..................................................................... 175
Discrete/Integrated Magnetics Specifications ....................................................... 179
5 Series Express Chipset MAC Programming Interface................................. 115
®
5 Series Express Chipset/82577 NVM Contents........................................... 113
MAC Control Frames and Reception of Flow Control Packets..........................34
Transmitting PAUSE Frames .....................................................................35
Host Wake Up ........................................................................................36
Accessing The 82577’s Wake Up Register Using MDIC..................................44
Loopback Mode Settings ..........................................................................60
Interrupts ..............................................................................................81
Hardware Accessed Words .......................................................................96
Software Accessed Words ...................................................................... 106
Basic Configuration Software Words ........................................................ 111
82577 GbE PHY—Datasheet
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