DT28F160S570 Intel, DT28F160S570 Datasheet - Page 46

• Manufacturer Part Number: DT28F160S570
• Manufacturer: Intel

Specifications of DT28F160S570

• Density: 16Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: SSOP
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

28F160S5/28F320S5
6.6
NOTES:
1.
2.
3.
4.
5.
6.
46
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14
W15
#
Read timing characteristics during block erase, program, and lock-bit configuration operations are the same as during
read-only operations. Refer to AC Characteristics—Read-Only Operations .
Sampled, not 100% tested.
Refer to Table 3 for valid A
V
See Ordering Information for device speeds (valid operational combinations).
See Figures 13 through 15 for testing characteristics.
PP
should be at V
t
t
( t
t
( t
t
t
t
( t
t
t
t
( t
t
t
t
t
t
t
AC Characteristics—Write Operations
PHWL
ELWL
WLWH
DVWH
AVWH
WHEH
WHDX
WHAX
WHWL
SHWH
VPWH
WHGL
WHRL
QVSL
QVVL
T
WLEL
ELEH
EHWH
EHEL
A
= –40
Sym
)
)
( t
)
( t
( t
( t
( t
( t
( t
( t
( t
)
PHEL
AVEH
EHAX
VPEH
EHRL
DVEH
EHDX
SHEH
EHGL
o
PPH
C to +85
)
)
)
)
)
)
)
)
)
until determination of block erase, program, or lock-bit configuration success (SR.1/3/4/5 = 0).
RP# High Recovery to WE# (CE
CE
(WE# Setup to CE
WE# Pulse Width
(CE
Data Setup to WE# (CE
Address Setup to WE# (CE
CE
(WE# Hold from CE
Data Hold from WE# (CE
Address Hold from WE# (CE
WE# Pulse Width High
(CE
WP# V
V
Write Recovery before Read
WE# High to STS in RY/BY# Low
WP# V
V
PP
PP
IN
X
X
Versions
X
X
# Setup to WE# Going Low
# Hold from WE# High
Setup to WE# (CE
Hold from Valid SRD, STS in RY/BY# High
and D
# Pulse Width)
# Pulse Width High)
o
C (Extended) and T
IH
IH
Setup to WE# (CE
Hold from Valid SRD
IN
for block erase, program, or lock-bit configuration.
(6)
X
# Going Low)
X
Parameter
# High)
X
X
# ) Going High
# ) Going High
X
# ) High
A
X
X
= 0 °C to +70 °C (Commercial)
# ) Going High
X
# ) Going High
# ) High
X
# ) Going Low
(1, 6)
5 V ± 10% V
5 V ± 5%
Notes
2,4
2,4
2
3
3
2
CC
PRELIMINARY
Valid for All
Min
100
100
10
40
50
40
40
10
30
25
1
0
0
5
5
0
0
0
Speeds
Max
90
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns