LH28F016SCHR-L95 Sharp Electronics, LH28F016SCHR-L95 Datasheet

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... For secure code stor- age applications, such as networking, where code is either directly executed out of flash or downloaded to DRAM, the LH28F016SCT offers three levels of pro- tection: absolute protection with V hardware block locking, or flexible software block lock- ing ...

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... ADDRESS LATCH X DECODER ADDRESS COUNTER INPUT BUFFER IDENTIFIER REGISTER STATUS DATA REGISTER REGISTER DATA COMPARATOR Y GATING 32 64KB BLOCKS . . . Figure 2. LH28F016SCT Block Diagram 16M Flash Memory I LOGIC COMMAND CE REGISTER WRITE STATE RY/BY MACHINE PROGRAM ERASE VOLTAGE SWITCH V CC GND 28F016SCT-L95-2 Data Sheet ...

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... Do not float any power pins. With Supply CC the flash memory are inhibited. Device operations at invalid V teristics) produce spurious results and should not be attempted. Block erase, byte write and lock-bit configuration operations with V GND Supply Ground Do not float any ground pins. ...

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... LH28F016SCT OVERVIEW The LH28F160SCT-L95 is a high-performance 16M SmartVoltage Flash memory organized as 2MB × 8 bits. The 2MB of data is arranged in thirty-two 64KB blocks which are indivdually eraseable, lockable, and unlockable in-system. The memory map is shown in Figure 3. 1FFFFF 64KB BLOCK 1F0000 1EFFFF 64KB BLOCK ...

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... BUS OPERATION The local CPU reads and writes the flash memory in- system. All bus cycles to or from the flash memory con- form to standard microprocessor bus cycles. enables PP LH28F016SCT ...

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... PHWL another command can be written. As with any automated device important to assert RP during system reset. When the system comes out of Reset, it expects to read from the flash memory. Automated flash memories provide status 6 information when accessed during block erase, byte write or block lock bit configuration CPU reset ...

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... Flash Memory Write Writing commands to the CUI controls the reading of device data and identifier codes. They also control inspection and clearing of the status register. When the CUI also controls block erase, byte PP PP1/2/3 write and block write, and lock-bit configuration. ...

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... Write BA 2 Write x 2 Write x to enable block erase or byte write operations. will fail set a block lock-bit. RP must clear block lock-bits. The clear block lock-bits 16M Flash Memory SECOND BUS CYCLE OPER. ADDR. DATA FFH 90H Read IA ID 70H Read x SRD ...

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... Flash Memory Read Array Command Upon initial device power-up and after exit from deep power-down mode, the device defaults to Read Array mode. This operation is also initiated by writing the Read Array command. The device remains enabled for reads until another command is written. ...

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... The only other valid commands while block erase is suspended are Read Status Register and Block Erase Resume. After a Block Erase Resume command is written to the flash memory, the WSM will continue the block erase process. Status register bits SR.6 and SR.7 will automatically clear and RY/BY will return to V ...

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... Read Status Register and Byte Write Resume. After the Byte Write Resume command is written to the flash memory, the WSM will continue the byte write process. Status register bits SR.2 and SR.7 will automatically clear and RY/BY will return to V ...

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... Clear block lock bits enabled Master Lock Bit is set. Clear Block Lock Bits disabled Master Lock Bit override. Clear Block Lock Bits enabled HH 16M Flash Memory = clear block lock bits operation PP1/2/3 ≤ will fail. SR.3 and PP PPLK . attempted with the mas ...

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... Flash Memory Status Register 7 6 WSMS ESS ECLBS REGISTER REGISTER NUMBER SYMBOL Write State Machine Status SR.7 WSMS 1 = Ready 0 = Busy Erase Suspend Status SR.6 ESS 1 = Block Erase Suspended 0 = Block Erase in Progress/Completed Erase and Clear Lock Bits Status SR.5 ECLBS 1 = Error in Block Erase, or Clear Block Lock Bits ...

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... CSR.5, SR.4, SR.3, and SR.1 are only cleared by the Clear Status Register Command in cases where multiple blocks are erased before full status is checked error is detected, clear the Status Register before attempting a retry or other error recovery operations. 16M Flash Memory COMMENTS Data = 20H Addr = Within Block to be Erased Data = D0H ...

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... Flash Memory START WRITE 40H, ADDRESS WRITE BYTE DATA and ADDRESS READ STATUS REGISTER NO SUSPEND 0 SR.7 = BYTE WRITE 1 FULL STATUS CHECK IF DESIRED BYTE WRITE COMPLETE FULL STATUS CHECK PROCEDURE READ STATUS REGISTER DATA (see above SR.3 = RANGE ERROR 0 1 DEVICE SR ...

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... OPERATION Write Suspend Read Standby Standby BLOCK ERASE Write Resume COMPLETED WRITE FFH READ ARRAY DATA 16M Flash Memory COMMENTS Erase Data = B0H Addr = X Status Register Data Addr = X Check SR WSM Ready 0 = WSM Busy Check SR Block Erase Suspended 0 = Block Erase Completed Erase ...

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... Flash Memory START WRITE B0H READ STATUS REGISTER 0 SR SR.2 = COMPLETED 1 WRITE FFH READ ARRAY DATA DONE NO READING YES WRITE D0H BYTE WRITE READ ARRAY RESUMED Figure 8. Byte Write Suspend/Resume Flowchart Data Sheet BUS COMMAND OPERATION Byte Write Write Suspend ...

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... SR.5, SR.4, SR.3, and SR.1 are only cleared by the Clear Status Register command in cases where multiple lock-bits are set before full status is checked error is detected, clear the Status Register before attempting a retry or other error recovery operations. 16M Flash Memory COMMENTS Set Data = 60H Addr = Block Address (Block), ...

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... Flash Memory START WRITE 60H WRITE D0H READ STATUS REGISTER 0 SR FULL STATUS CHECK IF DESIRED CLEAR BLOCK LOCK-BITS COMPLETE FULL STATUS CHECK PROCEDURE READ STATUS REGISTER DATA (see above RANGE PP SR.3 = ERROR 0 1 DEVICE PROTECT SR.1 = ERROR 0 1 COMMAND SEQUENCE SR ...

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... V Trace On Printed Circuit Boards PP Updating Flash memories that reside in the target system requires that the printed circuit board designer pay attention to the V pin supplies the memory cell current for byte writing and block erasing. Use similar trace widths and layout ...

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... When designing portable systems, designers will consider battery power consumption not only during device operation, but also for data retention during sys- tem idle time. Flash memory’s nonvolatility increases usable battery life because data is retained when sys- tem power is removed. ...

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... V ± 0 Figure 13. Transient Input/Output Reference Waveform (Standard Speed Testing Configuration) 1.5 OUTPUT 28F016SCT-L95-12 VALUE NOTE: C Includes Jig Capacitance (pF) Figure 14. Transient Equivalent (pF (pF) L 16M Flash Memory MIN. MAX. UNIT 0 +70° C 2.70 3.60 V 3.00 3.60 V 4.75 5.25 V 4.50 5. TEST POINTS 2.0 2 ...

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... Flash Memory V CC SYMBOL PARAMETER MIN. MAX. MIN. MAX. MIN. MAX. I Input Load Current LI Output Leakage I LO Current 20 V Standby CC I CCS Current 0.1 V Deep Power CCD Down Current Read Current CCR Byte Write CCW Set Lock Bit Current V Block Erase or ...

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... I CCWS CCES (MAX.) and PPLK (MIN.), between V (MAX.) and V PPH2 PPH2 and 2.7 V and 3 CCR Block lock bit configuration operations are inhibited IH . Block erases and byte writes are inhibited when the corresponding IH 16M Flash Memory TEST CONDITIONS MIN 5 2 3 ...

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... Flash Memory AC CHARACTERISTICS — READ ONLY OPERATIONS 0°C to +70°C (L150 SYMBOL PARAMETER t Read Cycle Time AVAV t Address to Output Delay AVQV Output Delay ELQV t RP HIGH to Output Delay PHQV Output Delay GLQV Output in Low-Z ELQX t CE HIGH to Output in High-Z ...

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... LH28F016SCT V IH ADDRESSES ( ( ( ( DATA (D/ Figure 15. AC Waveforms for Read Operations 26 DEVICE STANDBY ADDRESS SELECTION ADDRESS STABLE t AVAV t GLQV t ELQV t GLQX t ELQX HIGH-Z VALID OUTPUT t AVQV t PHQV 16M Flash Memory DATA VALID t EHQZ t GHQZ t OH HIGH-Z 28F016SCT-L95-15 Data Sheet ...

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... Flash Memory AC Characteristics WRITE OPERATIONS -40°C to +85° SYMBOL PARAMETER t Write Cycle Time AVAV t RP HIGH Recovery to WE Going LOW PHWL t CE Setup to WE Going LOW ELWL t WE Pulse Width WLWH t Address Setup to WE Going HIGH AVWH t Data Setup to WE Going HIGH ...

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... SR.3, SR.4, SR.5 = 0). 4. Read timing characteristics during block erase, full chip erase, word/byte write and lock bit configuration operations are the same as during read-only operations. Refer to ‘AC Characteristics’ for read-only operations. 28 16M Flash Memory LH28F016SC-L120 UNIT NOTES MIN. MAX. ...

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... Flash Memory ±0.5 V (L100 ±0.25 V (L95 SYMBOL PARAMETER t Write Cycle Time AVAV t RP HIGH Recovery to WE Going LOW PHWL t CE Setup to WE Going LOW ELWL t WE Pulse Width WLWH Setup to WE Going HIGH PHHWH Setup to WE Going HIGH VPWH CCW ...

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... Read status register data. 6. Write Read Array command. Figure 16. AC Waveforms for WE-Controlled Write Operations AVAV AVWH t WHAX t ELWL t t WHEH WHGL t t WHWL WHQV1,2,3,4 t WLWH t DVWH t WHDX HIGH PHWL WHRL t PHHWH t VPWH 16M Flash Memory VALID SRD t QVPH t QVVL 28F016SCT-L95-16 Data Sheet ...

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... Flash Memory ALTERNATIVE CE-CONTROLLED WRITES -40°C to +85° SYMBOL PARAMETER t Write Cycle Time AVAV t RP HIGH Recovery to CE Going LOW PHEL t WE Setup to CE Going LOW WLEL t CE Pulse Width ELEH t Address Setup to CE Going HIGH AVEH t Data Setup to CE Going HIGH ...

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... SR.3, SR.4, SR systems where CE defines the write pulse width (within a longer WE timing waveform), all setup, hold, and inactive WE times should be measured relative to the CE waveform. 32 16M Flash Memory LH28F016SC-L120 UNIT NOTES MIN. ...

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... Flash Memory ±0.5 V (L100 ±0.25 V (L95 SYMBOL PARAMETER t Write Cycle Time AVAV t RP HIGH Recovery to CE Going LOW PHEL t WE Setup to CE Going LOW WLEL t CE Pulse Width ELEH Setup to CE Going HIGH PHHEH Setup to CE Going HIGH VPEH CCW ...

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... Read status register data. 6. Write Read Array command. Figure 17. AC Waveforms for CE-controlled Write Operations AVAV AVEH t EHAX t WLEL t t EHWH EHGL t t EHEL EHQV1,2,3,4 t ELEH t DVEH t EHDX HIGH EHRL PHEL t PHHEH t VPEH 16M Flash Memory VALID SRD t QVPH t QVVL 28F016SCT-L95-17 Data Sheet ...

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... Flash Memory RESET OPERATIONS SYMBOL PARAMETER t RP Pulse LOW Time PLPH RP LOW to Reset during Block Erase, t PLRH Byte Write or Lock bit Configuration V 2 HIGH 3 HIGH 235VPH HIGH CC NOTES tied this specification does not apply asserted reset will complete within 100 ns unless a block erase, lock bit, or chip erase operation is being performed ...

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... Assumes corresponding CC = -40°C to +85° TYP. MAX. TYP. MAX. 8 150 0.5 1.5 0 150 1.1 5 5.6 7 9.4 13.1 at nominal. Assumes corresponding CC 16M Flash Memory UNIT NOTES 10 150 7 125 µs 0.7 2 0.5 1.5 s 0 13.3 150 11.6 125 µ ...

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... Flash Memory ORDERING INFORMATION Product line designator for all SHARP Flash products Device Density 016 = 16M Architecture S = Regular Block Power Supply Type C = SmartVoltage Technology Data Sheet LH28F016SCHT-L95 LH28F016SCT Access Speed (ns pF), 100 Package T = 40-Lead TSOP R = 40-Lead TSOP (Reverse Bend) Operating Temperature Blank = 0 ˚ ...

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... No. 360, Bashen Road, Xin Development Bldg. 22 Waigaoqiao Free Trade Zone Shanghai 200131 P.R. China Email: smc@china.global.sharp.co.jp ©2003 by SHARP Corporation EUROPE SHARP Microelectronics Europe Division of Sharp Electronics (Europe) GmbH Sonninstrasse 3 20097 Hamburg, Germany Phone: (49) 40-2376-2286 Fax: (49) 40-2376-2232 www.sharpsme.com SINGAPORE SHARP Electronics (Singapore) PTE., Ltd. ...