TE28F800B3T90 Intel, TE28F800B3T90 Datasheet - Page 9

• Manufacturer Part Number: TE28F800B3T90
• Manufacturer: Intel

Specifications of TE28F800B3T90

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 19b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

Table 3.
3.0
Datasheet
Blocking (top or bottom)
Locking
Operating Temperature
Program/Erase Cycling
Packages
Notes:
1.
2.
3.
32-Mbit and 64-Mbit densities not available in 40-lead TSOP.
8-Mbit densities not available in µBGA* CSP.
V
Feature
CC
Max is 3.3 V on 0.25µm 32-Mbit devices.
B3 Device Feature Summary (Sheet 2 of 2)
Functional Overview
Intel provides the most flexible voltage solution in the flash industry, providing three discrete
voltage supply pins:
All B3 flash memory devices provide program/erase capability at 2.7 V or 12 V (for fast
production programming), and read with V
memory a large percentage of the time, 2.7 V V
savings.
The B3 flash memory device family is available in either x8 or x16 packages in the following
densities (see
The parameter blocks are located at either the top (denoted by -T suffix) or the bottom (-B suffix)
of the address map, to accommodate different microprocessor protocols for kernel code location.
The upper two (or lower two) parameter blocks can be locked to provide complete code security
for system initialization code. Locking and unlocking is controlled by Write Protect WP# (see
Section 12.0, “Block Locking” on page 62
•
•
•
•
•
•
•
V
V
V
8-Mbit (8, 388, 608-bit) flash memory organized as 512 Kwords of 16 bits each or 1024
Kbytes of 8-bits each.
16-Mbit (16, 777, 216-bit) flash memory organized as 1024 Kwords of 16 bits each or
2048 Kbytes of 8-bits each.
32-Mbit (33, 554, 432-bit) flash memory organized as 2048 Kwords of 16 bits each.
64-Mbit (67, 108, 864-bit) flash memory organized as 4096 Kwords of 16 bits each.
CC
CCQ
PP
for Program and Erase operation.
for Read operation
for output swing
Appendix C, “Ordering Information,”
Intel
48-Ball µBGA* CSP
28F008B3, 28F016B3
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)
®
40-lead TSOP
Order Number: 290580, Revision: 020
Advanced Boot Block Flash Memory (B3)
Sixty-three 64-Kbyte main blocks (32 Mbit)
Thirty-one 64-Kbyte main blocks (16 Mbit)
WP# locks/unlocks parameter blocks
Eight 8-Kbyte parameter blocks and
All other blocks protected using V
Fifteen 64-Kbyte blocks (8 Mbit) or
Extended: –40 °C to +85 °C
(1)
,
(2)
100,000 cycles
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
for details).
CC
at 2.7 V. Because many designs read from the flash
CC
28F320B3
28F800B3, 28F160B3,
48-Ball µBGA CSP
operation can provide substantial power
for availability):
48-Ball VF BGA
48-Lead TSOP,
PP
(3)
, 28F640B3
(2)
,
Section 3.2, “Memory
Maps and Block
Organization” on
page 11
Section 12.0
Table 32
Section
7.2
Section
7.2
Figure
Reference
8,
18 Aug 2005
6.2,
6.2,
Figure 9
Section
Section
9