MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 62

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

3.2.2.2 PAGE DESCRIPTORS. Figure 3-12 illustrates the page descriptors for both
4-Kbyte and 8-Kbyte page sizes. Refer to Section 4 Instruction and Data Caches for
details concerning caching page descriptors.
3.2.2.3 DESCRIPTOR FIELD DEFINITIONS. The field definitions for the table- and page-
level descriptors are listed in alphabetical order:
CM—Cache Mode
MOTOROLA
31
31
31
31
31
31
ROOT TABLE DESCRIPTOR (ROOT LEVEL)
4K POINTER TABLE DESCRIPTOR (POINTER LEVEL)
8K POINTER TABLE DESCRIPTOR (POINTER LEVEL)
4K PAGE DESCIPTOR (PAGE LEVEL)
8K PAGE DESCRIPTOR (PAGE LEVEL)
INDIRECT PAGE DESCRIPTOR (PAGE LEVEL)
This field selects the cache mode and accesses serialization as follows:
Section 4 Instruction and Data Caches provides detailed information on caching
modes, and Section 7 Bus Operation provides information on serialization.
00 = Cachable, Write-through
01 = Cachable, Copyback
10 = Noncachable, Serialized
11 = Noncachable
PHYSICAL ADDRESS
PHYSICAL ADDRESS
POINTER TABLE ADDRESS
Freescale Semiconductor, Inc.
PAGE TABLE ADDRESS
Figure 3-11. Table Descriptor Formats
Figure 3-12. Page Descriptor Formats
For More Information On This Product,
PAGE TABLE ADDRESS
Go to: www.freescale.com
M68040 USER'S MANUAL
DESCRIPTOR ADDRESS
13
UR
12
12
UR
UR
11
11
10
10
G
G
U1
U1
9
9
9
U0
U0
8
8
8
8
X
7
7
7
7
7
X
X
S
S
6
6
6
6
6
X
X
X
CM
CM
5
5
5
5
5
X
X
X
4
4
4
4
4
M
M
X
X
X
U
3
U
3
3
U
3
U
3
U
2
W
2
W
2
W
2
W
2
W
2
1
1
1
1
1
1
UDT
UDT
UDT
PDT
PDT
PDT
3- 13
0
0
0
0
0
0