TE28F160S375 Intel, TE28F160S375 Datasheet - Page 10

• Manufacturer Part Number: TE28F160S375
• Manufacturer: Intel

Specifications of TE28F160S375

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 75ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7/3.3/5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

28F160S3, 28F320S3
NOTES:
1.
2.
3.
2.0
The word-wide memories include an on-chip
Write State Machine (WSM) to manage block
erase,
functions. It allows for: 100% TTL-level control
inputs, fixed power supplies during block erasure,
programming, lock-bit configuration, and minimal
processor overhead with RAM-like interface
timings.
After initial device power-up or return from deep
power-down mode (see Bus Operations), the
10
Figures are not drawn to scale.
Address A
More information on µBGA* packages is available by contacting your Intel/Distribution sales office.
PRINCIPLES OF OPERATION
program,
A4
A5
A2
NC
A0
DQ0 DQ9 DQ2 DQ11 DQ4 DQ13 DQ14 STS
21
is not included in the 28F160S3.
GND A10 VPP CE0 A14 VCC
A7
A6
A1
NC BYTE#
DQ8 DQ1 DQ3 DQ12 DQ6 DQ15 OE#
VCC DQ10 GND VCC DQ5 GND
A9
A8
A3
and
Bottom View
A11 A12 A15 A17 A19
RP# A13 A16 A21 A20
lock-bit
A18 CE1 NC
DQ7 WP# WE#
configuration
Figure 4. BGA* Package Pinout
This is the view of the package as surface mounted on
the board. Note that the signals are mirror imaged.
WE#
OE#
A19
A20
NC
STS
DQ15
DQ14
GND
VCC
CE1
A17
A21
WP#
device defaults to read array mode. Manipulation
of external memory control pins allow array read,
standby, and output disable operations.
Read Array, Status Register, query, and identifier
codes can be accessed through the CUI
independent
programming voltage on V
block
configuration.
altering memory contents—block erase, program,
lock-bit configuration—are accessed via the CUI
and verified through the Status Register.
DQ13
DQ7
DQ6
DQ5
A14
A15
A16
A18
ADVANCE INFORMATION
DQ12
DQ4
CE0
VCC
A12
A13
erasure,
DQ11
VPP
RP#
DQ3
GND
A11
of
All
DQ10
BYTE#
DQ1
DQ2
A10
A9
A8
A3
the
functions
VCC
program,
DQ8
DQ9
GND
NC
A7
A6
A1
V
DQ0
NC
PP
PP
A4
A5
A2
A0
enables successful
voltage.
associated
and
lock-bit
Proper
with