TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 32

TXC-04252AIPQ

Manufacturer Part Number
TXC-04252AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04252AIPQ

Pin Count
160
Screening Level
Industrial
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Ed. 3, December 2000
QE1M
TXC-04252
RDY pulse width
UPAD(7-0) data output
delay after RD
UPAD(7-0) data output
delay after RDY
UPAD(7-0) data output tristate to driven delay after RD
TXC-04252-MB
Notes:
1. All output times are measured with a maximum 75 pF load capacitance.
2. One SPcyc equals two EXTCK clock cycles.
3. Excessive external microprocessor data RAM access could interfere with the QE1M internal data processing, result-
(The EXTCK clock frequency is 58.32 MHz. One SPcyc is about 34.29 ns.)
ing in data corruption. To prevent such a situation, when excessive external microprocessor data RAM access is
detected, QE1M tries to slow down the external microprocessor access rate by lengthening the RDY pulse width to
as high as 97 * SPcyc.
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
Parameter
Register cycle
SPOT instruction read (Note 2)
Data RAM read (Note 3)
Register read only
SPOT instruction read and data
RAM read only
DATA SHEET
- 32 of 148 -
Symbol
t
t
t
t
PW(3)
OD(2)
OD(3)
OD(4)
6 * SPcyc
9 * SPcyc
Min
8.0
2.0
Typ
7 * SPcyc
SPcyc
Max
33 *
0.0
0.0
28
Unit
ns
ns
ns
ns
ns
ns

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