TXC-04252AIPQ Transwitch Corporation, TXC-04252AIPQ Datasheet - Page 99

• Manufacturer Part Number: TXC-04252AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-04252AIPQ

• Pin Count: 160
• Screening Level: Industrial
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

MEMORY MAP
The QE1M memory map consists of counters and register bit positions which may be accessed by the micro-
processor. The memory map segment consists of 7FF (hex) address locations. Address locations in the range
000H - 7FFH that are shown as unused, or are unlisted, must not be accessed by the microprocessor. Unused
bit positions within register locations will contain unspecified values when read, unless a 0 or 1 value is indi-
cated in the tables below, or the address can be written by the microprocessor, in which case unused bit posi-
tions must always be set to 0. All counters saturate at full count and are cleared when they are read.
The common memory map segment consists of the Device ID, Program ID, Internal Processor, Control, Provi-
sioning, Interrupt Indication, and Interrupt Status registers. The A bus segment consists of the A Drop and Add
status registers. The B bus segment consists of the B Drop and Add status registers. Each Port n memory map
segment (where n = 1-4) consists of the Desynchronizer, Provisioning, Status and Operations registers, and
various counters. There are also Port n registers for J2 and N2 (Z6) message segments.
Some memory locations, at addresses 032H and above, are shown shaded in the memory map. These loca-
tions reside in the 2k x 8 Data RAM of the internal SPOT processor and are not reset by the software or hard-
ware resets but only by INITSP. They are subject to arbitrated access by both the internal SPOT processor
and the external microprocessor. An attempt to access any of these locations will toggle the RDY/DTACK out-
put lead to pause the external microprocessor until the location is available for external access. While control
bit RPSPOT is set to 1, these locations are assigned to use by the SPOT processor and must not be accessed
by the external microprocessor unless they are addresses designated for microprocessor access while the
SPOT processor is being reprogrammed (i.e., addresses 100H, 102H and 103H).
DEVICE ID
PROGRAM ID
* R=Read Only; R(L)=Read Only (Latched); R/W=Read/Write; W=Write Only.
Address
Address
(Hex)
(Hex)
6BD
6BE
6BF
000
001
002
003
004
Status*
Status*
Proprietary TranSwitch Corporation Information for use Solely by its Customers.
R/W
R/W
R/W
R
R
R
R
R
Program Revision Checksum/execution flag (PID-CHK)
Part 1 of two-part program release number (PGMRV1)
Part 2 of two-part program release number (PGMRV2)
Bit 7
Bit 7
1
1
0
Mask Level (reads as 0000)
Revision (Version) Level
Bit 6
Bit 6
1
1
0
Bit 5
Bit 5
0
0
0
DATA SHEET
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Bit 4
Bit 4
1
0
0
Bit 3
Bit 3
0
0
1
0
Growth (reads as 0000)
Bit 2
Bit 2
1
0
0
0
Bit 1
Bit 1
1
0
0
0
Ed. 3, December 2000
TXC-04252
TXC-04252-MB
Bit 0
Bit 0
QE1M
1
0
1
1