ATA5823-PLQW 80 Atmel, ATA5823-PLQW 80 Datasheet - Page 33

• Manufacturer Part Number: ATA5823-PLQW 80
• Manufacturer: Atmel

Specifications of ATA5823-PLQW 80

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Compliant

10.1
10.2
10.3
4829D–RKE–06/06
OFF Mode
IDLE Mode
Reset Timing and Reset Logic
After connecting the power supply (battery) to pin VS1 and/or VS2 and VSINT, the transceiver is
in OFF mode. In OFF mode AVCC and DVCC are disabled, resulting in very low power con-
sumption (I
5-1 on page 8
In OFF mode the transceiver is not programmable via the 4-wire serial interface.
In IDLE mode AVCC and DVCC are connected to the battery voltage (VS1).
From OFF mode the transceiver changes to IDLE mode if pin PWR_ON is set to 1 or pin
N_PWR_ON is set to 0. This state transition is indicated by an interrupt at pin IRQ and the status
bits Power_On = 1 or N_Power_On = 1.
In IDLE mode the RF transceiver is disabled and the power consumption I
270 µA (CLK output OFF VS1 = VS2 = 3V). The exact value of this current is strongly dependent
on the application and the exact operation mode, therefore check the section “Electrical Charac-
teristics” for the appropriate application case.
Via the 4-wire serial interface a connected microcontroller can program the required parameter
and enable the TX, RX polling, RX or FD mode.The transceiver can be set back to OFF mode by
an OFF command via the 4-wire serial interface (the input level of pin PWR_ON must be 0 and
pin N_PWR_ON = 1 before writing the OFF command)
Table 10-1.
If the transceiver is switched on (OFF mode to IDLE mode) DVCC and AVCC are ramping up as
illustrated in
sets the control register to default values. Bit DVCC_RST in the status register is set to 1.
After V
clock at pin CLK is available.
DVCC_RST in the status register is set to 0 if V
is elapsed and the status register is read via the 4-wire serial interface.
If V
ceiver switches to OFF mode.
DVCC
DVCC
drops below 1.6V (typically) and pin N_PWR_ON = 1 and pin PWR_ON = 0 the trans-
OPM2
S_OFF
0
exceeds 1.6V (typically) and the start-up time of the XTO is elapsed, the output
Figure
and 0.5
Control Register 1
is typically 10 nA in the key fob application
10-3. The internal signal DVCC_RESET resets the digital control logic and
µA
in the car application
OPM1
0
DVCC
Figure 4-1 on page 7
exceeds 1.6V, the start-up time of the XTO
OPM0
0
ATA5823/ATA5824
Figure 3-1 on page 6
and
Figure 6-1 on page
IDLE_VS1,2
IDLE mode
Function
and
is about
Figure
9).
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