ATA5823-PLQW 80 Atmel, ATA5823-PLQW 80 Datasheet - Page 61

• Manufacturer Part Number: ATA5823-PLQW 80
• Manufacturer: Atmel

Specifications of ATA5823-PLQW 80

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Height (mm): 0.9mm
• Product Length (mm): 7mm
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Compliant

14.2
4829D–RKE–06/06
TX Operation
The transceiver is set to TX operation by using the bits OPM0, OPM1 and OPM2 in the control
register 1.
Table 14-4.
Before activating the TX mode, the TX parameters (bit rate, modulation scheme...) must be
selected as illustrated in
control register 6 and TX0 to TX5 in control register 7 (see section
37). The modulation is selected with ASK_NFSK in control register 4. The FSK frequency devia-
tion is fixed to about ±19 kHz (see
modulator is disabled and pattern mode is active (NRZ, see
After the transceiver is set to TX mode the start-up mode is active and the PLL is enabled. If the
PLL is locked, the TX mode is active.
If the transceiver is in start-up or TX mode, the TX/RX data buffer can be loaded via the 4-wire
serial interface. After N bytes are in the buffer and the TX mode is active, the transceiver starts
transmitting automatically (beginning with the MSB). Bit 0 to Bit 4 in the command Write TX/RX
Data Buffer defines the value N (0 N 16; see section
While transmitting, it is permanently possible to load new data in the TX/RX data buffer. To pre-
vent a buffer overflow or interruptions during transmitting the user must ensure that data is
loaded at the same speed as it is transmitted.
There is a counter that indicates the number of bytes to be transmitted (see section
Configuration” on page
ted, the counter is decremented. The counter value is available via the 4-wire serial interface. An
IRQ is issued if the counter reaches the value defined by the control bits IR0 and IR1 in control
register 1.
Note:
If T_Mode in control register 1 is set to 1, the transceiver is in TX transparent mode. In this mode
the TX/RX data buffer is disabled and the TX data stream must be applied on pin SDI_TMDI.
Figure 14-10 on page 62
OPM2
Writing to the control register 1, 4, 5, 6 or 7 during TX mode, resets the TX/RX data buffer and the
counter which indicates the number of bytes to be transmitted.
0
Control Register 1
47). If a byte is loaded, the counter is incremented, if a byte is transmit-
Figure 14-10 on page
illustrates the flow chart of the TX transparent mode.
OPM1
0
Table 9-1 on page
OPM0
62. The bit rate depends on Baud0 and Baud1 in
1
30). If P_Mode is set to 1, the Manchester
“Command Structure” on page
ATA5823/ATA5824
Table 14-5 on page
“Control Register” on page
TX mode
Function
64).
“Transceiver
49).
61