TDA5230XT Infineon Technologies, TDA5230XT Datasheet - Page 112

• Manufacturer Part Number: TDA5230XT
• Manufacturer: Infineon Technologies

Specifications of TDA5230XT

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4.4mm
• Product Length (mm): 9.7mm
• Lead Free Status / Rohs Status: Compliant

Dual:
ADDR:
Dual:
ADDR:
Data Sheet
TVWIN
7:3
2:0
Bit R/W Description
Bit R/W Description
7
2
ATSIMODE
W
W
ATSIGAP
W
W
0x82
0x85
=
round max
TSIGRSYN: TSI Gap Resync Mode (For detailed information, see
ATSIGAP/BTSIGAP register description)
0: OFF
1: PLL reset after TSI Gap
MANCPAJ: Manchester code phase readjustment
0: disabled - Manchester code polarity is defined by the TSI pattern. Use as
default, if TSI 8bit GAP Mode is not used
1: enabled - the code phase readjustment will be done with each “1001” or
“0110” Manchester data change. Use for TSI 8bit GAP Mode
TSIGAP: TSI Gap (T/2 bit resolution)
1Fh: 15 1/2 bit gap
00h: 0 bit gap
TSIGAP is used to lock the PLL after TSI A is found, if the TSI detection
mode 10b is selected.
GAPVAL: TSI Gap (T/16 bit resolution)
111b: 7/16 bit gap
000b: 0 bit gap
GAPVAL is used to correct the DCO phase after TSIGAP time, if the
TSIMODE.TSIGRSYN is disabled
and
and
(
and BTSIGAP:
0xA2
0xA5
and BTSIMODE:
{
(
(
8
+
16 CV
⋅
TSI GAP
+
TSI Detection Mode
8
) 1,25
⋅
108
) 8
,
(
+
16 TSIA
⋅
Functional Description
CV
Reset Value: 0x00
Reset Value: 0x00
Version 4.0, 2007-06-01
+
16 1 ⋅
+
8
TDA523x
) 1,25
⋅
}
)