TDA5230XT Infineon Technologies, TDA5230XT Datasheet - Page 32

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TDA5230XT

Manufacturer Part Number
TDA5230XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TDA5230XT

Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Lead Free Status / Rohs Status
Compliant
2.4.4
The Phase Locked Loop RF synthesizer consists of a VCO, programmable divider
chains, a phase detector, a charge pump and a loop filter. The on chip VCO includes a
spiral-inductor and varactors. The loop filter is also fully integrated on chip. The VCO
signal is fed to both the programmable synthesizer divider chain and to a programmable
RF divider. This RF divider allows selection between three operational frequency bands
and drives a fixed divider by four, which generates the quadrature LO signals for the
Image Reject Mixer.
Figure 16
Selection of a distinct operational frequency band is done via the SFR control bits
RFPLLA. The overall division factor of the PLL-loop is determined by the content of the
SFR control bits RFPLLRx and RFPLLSx, which control a programmable tri-modulus
divider and a reference frequency divider. Depending on the configuration of the multi-
channel feature, the effective source of the control bits RFPLLRx can either be
RFPLLR1, RFPLLR2 or RFPLLR3 and the source of the control bits RFPLLSx can be
either RFPLLS1, RFPLLS2 or RFPLLS3.
Data Sheet
A = 3 for 302..320 MHz
A = 2 for 433..450 MHz
A = 1 for 865..870 MHz
LO-Signals
Divide by 4
Divide by A
RF-PLL Synthesizer
0 °
I
RF-VCO
RF PLL
90 °
Q
2
RFPLLA
Loop-
Filter
Divide by N = 256 * R + S
S = -1, 0, +1
2
28
Phase-Detector
Charge-Pump
R = 1 ... 8
3
Functional Description
Version 4.0, 2007-06-01
Divide by R
R = 1 … 8
3
TDA523x
f
sys

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