T5743N-TG Atmel, T5743N-TG Datasheet - Page 13

• Manufacturer Part Number: T5743N-TG
• Manufacturer: Atmel

Specifications of T5743N-TG

• Operating Frequency (max): 450000kHz
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / Rohs Status: Not Compliant

After the end of a data transmission, the receiver remains
active. Depending of the bit Noise_Disable in the OP-
MODE register, the output signal at Pin DATA is high or
random noise pulses appear at Pin DATA (see chapter
’Digital Noise Supression’). The edge-to-edge time pe-
riod t
slightly higher than T
Switching the Receiver Back to Sleep Mode
The receiver can be set back to polling mode via Pin
DATA or via Pin POLLING/_ON.
When using Pin DATA, this pin must be pulled to Low for
the period t1 by the connected C. Figure 19 illustrates
the timing of the OFF command (see also figure 34). The
Rev. A3, 17-Dec-01
Data_out (DATA)
Serial bi–directional
data line
Out1 ( C)
IC_ACTIVE
IC_ACTIVE
POLLING/_ON
Data_out (DATA)
Serial bi–directional
data line
ee
of the majority of these noise pulses is equal or
X
X
Receiving
mode
DATA_min
Figure 20. Timing diagram of the OFF-command via Pin POLLING/_ON
t1
Receiving mode
Figure 19. Timing diagram of the OFF-command via Pin DATA
.
OFF–command
X
X
t2
t
on2
t3
(Start bit)
t4
Bit 1
(”1”)
Sleep mode
t
t10
t5
t7
on3
Start–up mode
minimum value of t1 depends on BR_Range. The maxi-
mum value for t1 is not limited but it is recommended not
to exceed the specified value to prevent erasing the reset
marker. Note also that an internal reset for the OPMODE
and the LIMIT register will be generated if t1 exceeds the
specified values. This item is explained in more detail in
the chapter ‘Configuration of the Receiver’. Setting the
receiver to sleep mode via DATA is achieved by program-
ming bit 1 to be ‘1’ during the register configuration. Only
one sync pulse (t3) is issued.
The duration of the OFF command is determined by the
sum of t1, t2 and t10. After the OFF command the sleep
time T
DATA is limited (see chapter ’Data Interface’).
Sleep
elapses. Note that the capacitive load at Pin
Sleep mode
Bit–check mode
T
Sleep
Bit check ok
X
X
Receiving mode
T5743N
Start–up mode
T
Start–up
13 (34)