T5743N-TG Atmel, T5743N-TG Datasheet - Page 23

T5743N-TG

Manufacturer Part Number
T5743N-TG
Description
Manufacturer
Atmel
Datasheet

Specifications of T5743N-TG

Operating Frequency (max)
450000kHz
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Not Compliant
The configuration registers are programmed serially via
the bi-directional data line according to figure 33 and fig-
ure 34.
To start programming, the serial data line DATA is pulled
to Low for the time period t1 by the C. When DATA has
been released, the receiver becomes the master device.
When the programming delay period t2 has elapsed, it
emits 15 subsequent synchronization pulses with the
pulse length t3. After each of these pulses, a programming
window occurs. The delay until the program window
starts is determined by t4, the duration is defined by t5.
Within the programming window, the individual bits are
set. If the C pulls down Pin DATA for the time period t7
during t5, the according bit is set to ’0’. If no program-
ming pulse t7 is issued, this bit is set to ’1’. All 15 bits are
subsequently programmed this way. The time frame to
program a bit is defined by t6.
Bit 15 is followed by the equivalent time window t9. Dur-
ing this window, the equivalence acknowledge pulse t8
(E_Ack) occurs if the just programmed mode word is
equivalent to the mode word that was already stored in
that register. E_Ack should be used to verify that the
mode word was correctly transferred to the register. The
register must be programmed twice in that case.
Programming of a register is possible both in sleep– and
in active–mode of the receiver.
During programming, the LNA, LO, lowpass filter IF-
amplifier and the FSK/ASK Manchester demodulator are
disabled.
The programming start pulse t1 initiates the program-
ming of the configuration registers. If bit 1 is set to ’1’, it
represents the OFF–command to set the receiver back to
Table 13 Applicable R
Rev. A3, 17-Dec-01
C
C
L
L
100pF
1nF
pup
BR_range
B0
B1
B2
B3
B0
B1
B2
B3
polling mode at the same time. For the length of the pro-
gramming start pulse t1, the following convention should
be considered:
D t1(min) < t1 < 5632 T
Programming respectively OFF-command is initiated if
the receiver is not in reset mode.If the receiver is in reset
mode, programming respectively Off-command is not in-
itiated and the reset marker RM is still present at Pin
DATA.
This period is generally used to switch the receiver to pol-
ling mode or to start the programming of a register. In
reset condition, RM is not cancelled by accident.
D t1 > 7936 T
Programming respectively OFF–command is initiated in
any case. The registers OPMODE and LIMIT are set to
the default values. RM is cancelled if present.
This period is used if the connected C detected RM.If the
receiver operates in default mode, this time period for t1
can generally be used.
Note that the capacitive load at Pin DATA is limited.
Data Interface
The data interface (see figure 34) is designed for automo-
tive requirements. It can be connected via the pull–up
resistor R
The applicable pull–up resistor R
capacity C
table 13). More detailed information about the calcula-
tion of the maximum load capacity at Pin DATA is given
in the ’Application Hints U3743BM’.
specified value for the relevant BR_Range
pup
L
at Pin DATA and the selected BR_range (see
up to 20V and is short–circuit–protected.
Clk
1.6 k to 470 k
1.6 k to 220 k
1.6 k to 120 k
Applicable R
1.6 k to 5.6 k
1.6 k to 47 k
1.6 k to 22 k
1.6 k to 12 k
1.6 k to 56 k
Clk
: t1(min) is the minimum
pup
T5743N
pup
depends on the load
23 (34)

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