T5743N-TG Atmel, T5743N-TG Datasheet - Page 18

• Manufacturer Part Number: T5743N-TG
• Manufacturer: Atmel

Specifications of T5743N-TG

• Operating Frequency (max): 450000kHz
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / Rohs Status: Not Compliant

2.
If the bit Noise_Disable (see table 10) in the OPMODE
register is set to 0, digital noise appears at the end of a
valid data stream. To suppress the noise, the Pin POLL-
ING/_ON must be set to Low. The receiver remains in
receiving mode. Then, the OFF-command causes the
change to the start-up mode. The programmed sleep time
(see table 8) will not be executed because the level at Pin
Configuration of the Receiver
The T5743N receiver is configured via two 12-bit RAM
registers called OPMODE and LIMIT. The registers can
be programmed by means of the bidirectional DATA port.
If the register contents have changed due to a voltage
drop, this condition is indicated by a certain output pat-
tern called reset marker (RM). The receiver must be
reprogrammed in that case. After a power-on reset (POR),
the registers are set to default mode. If the receiver is op-
erated in default mode, there is no need to program the
registers. Table 4 shows the structure of the registers. Ac-
cording to table 2 bit 1 defines if the receiver is set back
to polling mode via the OFF command (see chapter ’Re-
ceiving Mode’) or if it is programmed. Bit 2 represents the
register address. It selects the appropriate register to be
programmed. To get a high programming reliability,
Bit15 (Stop bit), at the end of the programming operation,
must be set to 0.
T5743N
(DATA_CLK)
POLLING/_ON
Serial bi–directional
data line
18 (34)
Controlled noise suppression by the C
(figure 31):
Bit–check
mode
Bit check ok
Preburst
Data
Receiving mode
Figure 31. Controlled noise suppression
Digital Noise
OFF–command
Start–up
mode
POLLING/_ON is low, but the bit check is active in that
case. The OFF-command activates the bit check also if
the Pin POLLING/_ON is held to Low. The receiver
changes back to receiving mode if the bit check was suc-
cessful. To activate the polling mode at the end of the data
transmission, the Pin POLLING/_ON must be set to High.
This way to suppress the noise is recommended if the data
stream is not Manchester or Bi-phase coded.
Table 2 Effect of Bit 1 and Bit 2 on programming the registers
Table 3 Effect of Bit 15 on programming the register
Bit 1
1
0
0
Bit 15
0
1
Bit–check
mode
Bit 2
Bit check ok
x
1
0
The values will be written into the
register (OPMODE or LIMIT)
The values will not be written into the
register
Preburst
The receiver is set back to polling
mode (OFF command)
The OPMODE register is pro-
grammed
The LIMIT register is programmed
Receiving mode
Data
Action
Action
Rev. A3, 17-Dec-01
Digital Noise
Sleep
mode